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| author | Jim Grosbach <grosbach@apple.com> | 2012-04-27 23:51:33 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-04-27 23:51:33 +0000 |
| commit | bb32f1d545241ab957f402165cec359d4473c0ca (patch) | |
| tree | 0b88db09f1f9972cff28bc96513d02b5e232cfc2 /lib/Target/ARM/ARMInstrThumb.td | |
| parent | f3db6b855e9c6b7d5d6a0a1fa52f5391921fa9ba (diff) | |
| download | external_llvm-bb32f1d545241ab957f402165cec359d4473c0ca.zip external_llvm-bb32f1d545241ab957f402165cec359d4473c0ca.tar.gz external_llvm-bb32f1d545241ab957f402165cec359d4473c0ca.tar.bz2 | |
ARM: Tweak tADDrSP definition for consistent operand order.
Make the operand order of the instruction match that of the asm syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155747 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrThumb.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 6335229..081c0ab 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -363,8 +363,8 @@ def : tInstAlias<"sub${p} sp, sp, $imm", (tSUBspi SP, t_imm0_508s4:$imm, pred:$p)>; // ADD <Rm>, sp -def tADDrSP : T1pIt<(outs GPR:$Rdn), (ins GPR:$Rn, GPRsp:$sp), IIC_iALUr, - "add", "\t$Rdn, $sp, $Rn", []>, +def tADDrSP : T1pIt<(outs GPR:$Rdn), (ins GPRsp:$sp, GPR:$Rn), IIC_iALUr, + "add", "\t$Rdn, $sp, $Rn", []>, T1Special<{0,0,?,?}> { // A8.6.9 Encoding T1 bits<4> Rdn; |