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author | Evan Cheng <evan.cheng@apple.com> | 2009-07-25 00:33:29 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-07-25 00:33:29 +0000 |
commit | 66ac53165e17b7c76b8c69e57bde623d44ec492e (patch) | |
tree | b9d935e416aac3ec82ffea50d7f543a2f590dba4 /lib/Target/ARM/ARMInstrThumb2.td | |
parent | 4711326d60251e9394192032e6646fff0d113eee (diff) | |
download | external_llvm-66ac53165e17b7c76b8c69e57bde623d44ec492e.zip external_llvm-66ac53165e17b7c76b8c69e57bde623d44ec492e.tar.gz external_llvm-66ac53165e17b7c76b8c69e57bde623d44ec492e.tar.bz2 |
Change Thumb2 jumptable codegen to one that uses two level jumps:
Before:
adr r12, #LJTI3_0_0
ldr pc, [r12, +r0, lsl #2]
LJTI3_0_0:
.long LBB3_24
.long LBB3_30
.long LBB3_31
.long LBB3_32
After:
adr r12, #LJTI3_0_0
add pc, r12, +r0, lsl #2
LJTI3_0_0:
b.w LBB3_24
b.w LBB3_30
b.w LBB3_31
b.w LBB3_32
This has several advantages.
1. This will make it easier to optimize this to a TBB / TBH instruction +
(smaller) table.
2. This eliminate the need for ugly asm printer hack to force the address
into thumb addresses (bit 0 is one).
3. Same codegen for pic and non-pic.
4. This eliminate the need to align the table so constantpool island pass
won't have to over-estimate the size.
Based on my calculation, the later is probably slightly faster as well since
ldr pc with shifter address is very slow. That is, it should be a win as long
as the HW implementation can do a reasonable job of branch predict the second
branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77024 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrThumb2.td')
-rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 22 |
1 files changed, 5 insertions, 17 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index bb36a33..c265d9f 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -1080,24 +1080,12 @@ def t2B : T2XI<(outs), (ins brtarget:$target), "b $target", [(br bb:$target)]>; -let isNotDuplicable = 1, isIndirectBranch = 1 in { -def t2BR_JTr : T2JTI<(outs), (ins GPR:$target, jtblock_operand:$jt, i32imm:$id), - "mov pc, $target \n\t.align\t2\n$jt", - [(ARMbrjt GPR:$target, tjumptable:$jt, imm:$id)]>; - -def t2BR_JTm : - T2JTI<(outs), - (ins t2addrmode_so_reg:$target, jtblock_operand:$jt, i32imm:$id), - "ldr pc, $target \n\t.align\t2\n$jt", - [(ARMbrjt (i32 (load t2addrmode_so_reg:$target)), tjumptable:$jt, - imm:$id)]>; - -def t2BR_JTadd : +let isNotDuplicable = 1, isIndirectBranch = 1 in +def t2BR_JT : T2JTI<(outs), - (ins GPR:$target, GPR:$idx, jtblock_operand:$jt, i32imm:$id), - "add pc, $target, $idx \n\t.align\t2\n$jt", - [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt, imm:$id)]>; -} // isNotDuplicate, isIndirectBranch + (ins GPR:$base, GPR:$idx, jt2block_operand:$jt, i32imm:$id), + "add pc, $base, $idx, lsl #2\n$jt", + [(ARMbr2jt GPR:$base, GPR:$idx, tjumptable:$jt, imm:$id)]>; } // isBranch, isTerminator, isBarrier // FIXME: should be able to write a pattern for ARMBrcond, but can't use |