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| author | Evan Cheng <evan.cheng@apple.com> | 2010-10-07 01:50:48 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-07 01:50:48 +0000 |
| commit | 5a50ceeaea980962c1982ad535226c7ab06c971c (patch) | |
| tree | 4a833b2b855be5707dd7c13552403bae9cae448a /lib/Target/ARM/ARMInstrVFP.td | |
| parent | b046810fe4a00a12518ba3020b697929c51eb58e (diff) | |
| download | external_llvm-5a50ceeaea980962c1982ad535226c7ab06c971c.zip external_llvm-5a50ceeaea980962c1982ad535226c7ab06c971c.tar.gz external_llvm-5a50ceeaea980962c1982ad535226c7ab06c971c.tar.bz2 | |
Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vldr / vstr, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115898 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrVFP.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrVFP.td | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td index 53d181b..2434400 100644 --- a/lib/Target/ARM/ARMInstrVFP.td +++ b/lib/Target/ARM/ARMInstrVFP.td @@ -78,20 +78,20 @@ def VSTRS : ASI5<0b1101, 0b00, (outs), (ins SPR:$src, addrmode5:$addr), let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1 in { def VLDMD : AXDI4<(outs), (ins addrmode4:$addr, pred:$p, reglist:$dsts, - variable_ops), IndexModeNone, IIC_fpLoadm, + variable_ops), IndexModeNone, IIC_fpLoad_m, "vldm${addr:submode}${p}\t$addr, $dsts", "", []> { let Inst{20} = 1; } def VLDMS : AXSI4<(outs), (ins addrmode4:$addr, pred:$p, reglist:$dsts, - variable_ops), IndexModeNone, IIC_fpLoadm, + variable_ops), IndexModeNone, IIC_fpLoad_m, "vldm${addr:submode}${p}\t$addr, $dsts", "", []> { let Inst{20} = 1; } def VLDMD_UPD : AXDI4<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops), - IndexModeUpd, IIC_fpLoadm, + IndexModeUpd, IIC_fpLoad_mu, "vldm${addr:submode}${p}\t$addr!, $dsts", "$addr.addr = $wb", []> { let Inst{20} = 1; @@ -99,7 +99,7 @@ def VLDMD_UPD : AXDI4<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, def VLDMS_UPD : AXSI4<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops), - IndexModeUpd, IIC_fpLoadm, + IndexModeUpd, IIC_fpLoad_mu, "vldm${addr:submode}${p}\t$addr!, $dsts", "$addr.addr = $wb", []> { let Inst{20} = 1; @@ -108,20 +108,20 @@ def VLDMS_UPD : AXSI4<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1 in { def VSTMD : AXDI4<(outs), (ins addrmode4:$addr, pred:$p, reglist:$srcs, - variable_ops), IndexModeNone, IIC_fpStorem, + variable_ops), IndexModeNone, IIC_fpStore_m, "vstm${addr:submode}${p}\t$addr, $srcs", "", []> { let Inst{20} = 0; } def VSTMS : AXSI4<(outs), (ins addrmode4:$addr, pred:$p, reglist:$srcs, - variable_ops), IndexModeNone, IIC_fpStorem, + variable_ops), IndexModeNone, IIC_fpStore_m, "vstm${addr:submode}${p}\t$addr, $srcs", "", []> { let Inst{20} = 0; } def VSTMD_UPD : AXDI4<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$srcs, variable_ops), - IndexModeUpd, IIC_fpStorem, + IndexModeUpd, IIC_fpStore_mu, "vstm${addr:submode}${p}\t$addr!, $srcs", "$addr.addr = $wb", []> { let Inst{20} = 0; @@ -129,7 +129,7 @@ def VSTMD_UPD : AXDI4<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, def VSTMS_UPD : AXSI4<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$srcs, variable_ops), - IndexModeUpd, IIC_fpStorem, + IndexModeUpd, IIC_fpStore_mu, "vstm${addr:submode}${p}\t$addr!, $srcs", "$addr.addr = $wb", []> { let Inst{20} = 0; |