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author | Jim Grosbach <grosbach@apple.com> | 2011-06-13 22:54:22 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2011-06-13 22:54:22 +0000 |
commit | f921c0fe3418f96bd1e37beb582a368d3ac24295 (patch) | |
tree | 06cdd2dc01746d3ca895c518a91fb98a39990996 /lib/Target/ARM/ARMInstrVFP.td | |
parent | c0e2607564c1259f2d2c56cbff8f78dc0853860d (diff) | |
download | external_llvm-f921c0fe3418f96bd1e37beb582a368d3ac24295.zip external_llvm-f921c0fe3418f96bd1e37beb582a368d3ac24295.tar.gz external_llvm-f921c0fe3418f96bd1e37beb582a368d3ac24295.tar.bz2 |
Clean up a few 80 column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132946 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrVFP.td')
-rw-r--r-- | lib/Target/ARM/ARMInstrVFP.td | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td index 376bd96..b4c3239 100644 --- a/lib/Target/ARM/ARMInstrVFP.td +++ b/lib/Target/ARM/ARMInstrVFP.td @@ -94,7 +94,8 @@ multiclass vfp_ldst_mult<string asm, bit L_bit, let Inst{20} = L_bit; } def DIA_UPD : - AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, variable_ops), + AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, + variable_ops), IndexModeUpd, itin_upd, !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b01; // Increment After @@ -102,7 +103,8 @@ multiclass vfp_ldst_mult<string asm, bit L_bit, let Inst{20} = L_bit; } def DDB_UPD : - AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, variable_ops), + AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, + variable_ops), IndexModeUpd, itin_upd, !strconcat(asm, "db${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b10; // Decrement Before @@ -124,7 +126,8 @@ multiclass vfp_ldst_mult<string asm, bit L_bit, let D = VFPNeonDomain; } def SIA_UPD : - AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, variable_ops), + AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, + variable_ops), IndexModeUpd, itin_upd, !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b01; // Increment After @@ -136,7 +139,8 @@ multiclass vfp_ldst_mult<string asm, bit L_bit, let D = VFPNeonDomain; } def SDB_UPD : - AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, variable_ops), + AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, + variable_ops), IndexModeUpd, itin_upd, !strconcat(asm, "db${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b10; // Decrement Before |