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| author | Jim Grosbach <grosbach@apple.com> | 2009-04-07 20:34:09 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2009-04-07 20:34:09 +0000 |
| commit | 30eae3c02244e18747f9f0dca6946d86d0ccb7f5 (patch) | |
| tree | 44e67111b90edc1491446bbf9fc880bd349477f5 /lib/Target/ARM/ARMRegisterInfo.h | |
| parent | f23e809be09aac2f1a01e84e2b03826322b2f856 (diff) | |
| download | external_llvm-30eae3c02244e18747f9f0dca6946d86d0ccb7f5.zip external_llvm-30eae3c02244e18747f9f0dca6946d86d0ccb7f5.tar.gz external_llvm-30eae3c02244e18747f9f0dca6946d86d0ccb7f5.tar.bz2 | |
PR2985 / <rdar://problem/6584986>
When compiling in Thumb mode, only the low (R0-R7) registers are available
for most instructions. Breaking the low registers into a new register class
handles this. Uses of R12, SP, etc, are handled explicitly where needed
with copies inserted to move results into low registers where the rest of
the code generator can deal with them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68545 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMRegisterInfo.h')
| -rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMRegisterInfo.h b/lib/Target/ARM/ARMRegisterInfo.h index db7ee5e..e1d9efb 100644 --- a/lib/Target/ARM/ARMRegisterInfo.h +++ b/lib/Target/ARM/ARMRegisterInfo.h @@ -54,6 +54,8 @@ public: const TargetRegisterClass *getPointerRegClass() const; /// Code Generation virtual methods... + const TargetRegisterClass * + getPhysicalRegisterRegClass(unsigned Reg, MVT VT = MVT::Other) const; const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const; const TargetRegisterClass* const* |