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author | Evan Cheng <evan.cheng@apple.com> | 2010-05-06 01:52:03 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2010-05-06 01:52:03 +0000 |
commit | 4ffc22ae000f207d3c660ebc197d31940025fbfa (patch) | |
tree | 24c9b36d88d76fcf2a4cdfdaf758775ca2b6c8a8 /lib/Target/ARM/ARMRegisterInfo.h | |
parent | d31c5496d7e1580058b5c6fbc8fd537a641ea590 (diff) | |
download | external_llvm-4ffc22ae000f207d3c660ebc197d31940025fbfa.zip external_llvm-4ffc22ae000f207d3c660ebc197d31940025fbfa.tar.gz external_llvm-4ffc22ae000f207d3c660ebc197d31940025fbfa.tar.bz2 |
Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registers. These will be used to model VLD2 / VST2 instructions in order to get substantially better codegen for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103156 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMRegisterInfo.h')
-rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMRegisterInfo.h b/lib/Target/ARM/ARMRegisterInfo.h index 041afd0..f13c7d4 100644 --- a/lib/Target/ARM/ARMRegisterInfo.h +++ b/lib/Target/ARM/ARMRegisterInfo.h @@ -29,7 +29,8 @@ namespace ARM { /// ARMRegisterInfo.td file. enum SubregIndex { SSUBREG_0 = 1, SSUBREG_1 = 2, SSUBREG_2 = 3, SSUBREG_3 = 4, - DSUBREG_0 = 5, DSUBREG_1 = 6 + DSUBREG_0 = 5, DSUBREG_1 = 6, DSUBREG_2 = 7, DSUBREG_3 = 8, + QSUBREG_0 = 9, QSUBREG_1 = 10 }; } |