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| author | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-06-06 20:26:18 +0000 |
|---|---|---|
| committer | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-06-06 20:26:18 +0000 |
| commit | 5be946b4866989cddf16fd3d1977da3c77351098 (patch) | |
| tree | dc4b6ee7996f897086c1cfda238fb03333ba6dbf /lib/Target/ARM/ARMScheduleA9.td | |
| parent | 3facc43ff69947f744f2a7b6ed94649ccb44df02 (diff) | |
| download | external_llvm-5be946b4866989cddf16fd3d1977da3c77351098.zip external_llvm-5be946b4866989cddf16fd3d1977da3c77351098.tar.gz external_llvm-5be946b4866989cddf16fd3d1977da3c77351098.tar.bz2 | |
ARM sched model: Add integer VFP/SIMD instructions on Swift
Reapply 183269.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183441 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMScheduleA9.td')
| -rw-r--r-- | lib/Target/ARM/ARMScheduleA9.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMScheduleA9.td b/lib/Target/ARM/ARMScheduleA9.td index 3566cd6..d06ad7d 100644 --- a/lib/Target/ARM/ARMScheduleA9.td +++ b/lib/Target/ARM/ARMScheduleA9.td @@ -2541,4 +2541,5 @@ def : WriteRes<WriteBrL, [A9UnitB]>; def : WriteRes<WriteBrTbl, [A9UnitB]>; def : WriteRes<WritePreLd, []>; def : SchedAlias<WriteCvtFP, A9WriteF>; +def : WriteRes<WriteNoop, []> { let Latency = 0; let NumMicroOps = 0; } } // SchedModel = CortexA9Model |