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| author | Evan Cheng <evan.cheng@apple.com> | 2012-12-20 19:59:30 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2012-12-20 19:59:30 +0000 |
| commit | 139e407d526193017d42473c8d4892933de78f14 (patch) | |
| tree | 37f08e11f0f3c4c2944880253feea017e2146aba /lib/Target/ARM/ARMSubtarget.cpp | |
| parent | 15019a8814b7877367ca7bcd7d173710259f7c20 (diff) | |
| download | external_llvm-139e407d526193017d42473c8d4892933de78f14.zip external_llvm-139e407d526193017d42473c8d4892933de78f14.tar.gz external_llvm-139e407d526193017d42473c8d4892933de78f14.tar.bz2 | |
On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr,
are more expensive than the non-flag setting variant. Teach thumb2 size
reduction pass to avoid generating them unless we are optimizing for size.
rdar://12892707
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170728 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMSubtarget.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMSubtarget.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp index 2766e7b..6042727 100644 --- a/lib/Target/ARM/ARMSubtarget.cpp +++ b/lib/Target/ARM/ARMSubtarget.cpp @@ -74,6 +74,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, , HasDataBarrier(false) , Pref32BitThumb(false) , AvoidCPSRPartialUpdate(false) + , AvoidMOVsShifterOperand(false) , HasRAS(false) , HasMPExtension(false) , FPOnlySP(false) |