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authorJim Grosbach <grosbach@apple.com>2011-12-21 21:04:19 +0000
committerJim Grosbach <grosbach@apple.com>2011-12-21 21:04:19 +0000
commit520dc78d92a47af5e644b09f401d278cb1d5d196 (patch)
treeb83d4f3b8e743b367a1fb385c575a3b16c7b192a /lib/Target/ARM/AsmParser
parent5c0d761d63337ba776dbc97dd454951e987926ab (diff)
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Thumb2 assembly parsing of 'mov rd, rn, rrx'.
Maps to the RRX instruction. Missed this case earlier. rdar://10615373 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147096 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/AsmParser')
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index ab954be..5e43872 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5802,6 +5802,7 @@ processInstruction(MCInst &Inst,
case ARM_AM::lsr: newOpc = isNarrow ? ARM::tLSRri : ARM::t2LSRri; break;
case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLri : ARM::t2LSLri; break;
case ARM_AM::ror: newOpc = ARM::t2RORri; isNarrow = false; break;
+ case ARM_AM::rrx: isNarrow = false; newOpc = ARM::t2RRX; break;
}
unsigned Ammount = ARM_AM::getSORegOffset(Inst.getOperand(2).getImm());
if (Ammount == 32) Ammount = 0;
@@ -5811,7 +5812,8 @@ processInstruction(MCInst &Inst,
TmpInst.addOperand(MCOperand::CreateReg(
Inst.getOpcode() == ARM::t2MOVSsi ? ARM::CPSR : 0));
TmpInst.addOperand(Inst.getOperand(1)); // Rn
- TmpInst.addOperand(MCOperand::CreateImm(Ammount));
+ if (newOpc != ARM::t2RRX)
+ TmpInst.addOperand(MCOperand::CreateImm(Ammount));
TmpInst.addOperand(Inst.getOperand(3)); // CondCode
TmpInst.addOperand(Inst.getOperand(4));
if (!isNarrow)