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| author | Tim Northover <Tim.Northover@arm.com> | 2012-09-22 11:18:12 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2012-09-22 11:18:12 +0000 |
| commit | 93c7c449a1351542fa5a275587187154dbedb8e0 (patch) | |
| tree | 090aa4c36f20481371bbe181268f9adf30736a57 /lib/Target/ARM/AsmParser | |
| parent | 23bd47c2d6d3c0735736bd0994ae116f534d9992 (diff) | |
| download | external_llvm-93c7c449a1351542fa5a275587187154dbedb8e0.zip external_llvm-93c7c449a1351542fa5a275587187154dbedb8e0.tar.gz external_llvm-93c7c449a1351542fa5a275587187154dbedb8e0.tar.bz2 | |
Fix the handling of edge cases in ARM shifted operands.
This patch fixes load/store instructions to handle less common cases
like "asr #32", "rrx" properly throughout the MC layer.
Patch by Chris Lidbury.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164455 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/AsmParser')
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 3e68a0b..bc711dc 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -4444,6 +4444,12 @@ bool ARMAsmParser::parseMemRegOffsetShift(ARM_AM::ShiftOpc &St, ((St == ARM_AM::lsl || St == ARM_AM::ror) && Imm > 31) || ((St == ARM_AM::lsr || St == ARM_AM::asr) && Imm > 32)) return Error(Loc, "immediate shift value out of range"); + // If <ShiftTy> #0, turn it into a no_shift. + if (Imm == 0) + St = ARM_AM::lsl; + // For consistency, treat lsr #32 and asr #32 as having immediate value 0. + if (Imm == 32) + Imm = 0; Amount = Imm; } |