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authorJim Grosbach <grosbach@apple.com>2011-12-22 17:04:50 +0000
committerJim Grosbach <grosbach@apple.com>2011-12-22 17:04:50 +0000
commitf1a88fc474b87d66906689f5bf76d67cb5b1a4c7 (patch)
tree414f2d7f8df596b86a37ba928110b59a996f97c8 /lib/Target/ARM/AsmParser
parentb143ea3739a9f714fff3e11ec472edfe06368748 (diff)
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Nuke invalid comment from copy/paste.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147150 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/AsmParser')
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index f276862..af9f97d 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5835,7 +5835,6 @@ processInstruction(MCInst &Inst,
case ARM::LSLr: ShiftTy = ARM_AM::lsl; break;
case ARM::RORr: ShiftTy = ARM_AM::ror; break;
}
- // A shift by zero is a plain MOVr, not a MOVsi.
unsigned Shifter = ARM_AM::getSORegOpc(ShiftTy, 0);
MCInst TmpInst;
TmpInst.setOpcode(ARM::MOVsr);