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author | Quentin Colombet <qcolombet@apple.com> | 2013-04-26 17:54:54 +0000 |
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committer | Quentin Colombet <qcolombet@apple.com> | 2013-04-26 17:54:54 +0000 |
commit | 1ad3a410beff11913db0573942fb51b651d01a13 (patch) | |
tree | 326f9e57d272f1977ee94dccdd59171a938b8afe /lib/Target/ARM/Disassembler | |
parent | 140536b936a59b359606dbca7b30d5d16472195a (diff) | |
download | external_llvm-1ad3a410beff11913db0573942fb51b651d01a13.zip external_llvm-1ad3a410beff11913db0573942fb51b651d01a13.tar.gz external_llvm-1ad3a410beff11913db0573942fb51b651d01a13.tar.bz2 |
ARM: Fix encoding of hint instruction for Thumb.
"hint" space for Thumb actually overlaps the encoding space of the CPS
instruction. In actuality, hints can be defined as CPS instructions where imod
and M bits are all nil.
Handle decoding of permitted nop-compatible hints (i.e. nop, yield, wfi, wfe,
sev) in DecodeT2CPSInstruction.
This commit adds a proper diagnostic message for Imm0_4 and updates all tests.
Patch by Mihail Popa <Mihail.Popa@arm.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180617 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler')
-rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 32b47fb..ac937f3 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -1953,10 +1953,12 @@ static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, Inst.addOperand(MCOperand::CreateImm(mode)); if (iflags) S = MCDisassembler::SoftFail; } else { - // imod == '00' && M == '0' --> UNPREDICTABLE - Inst.setOpcode(ARM::t2CPS1p); - Inst.addOperand(MCOperand::CreateImm(mode)); - S = MCDisassembler::SoftFail; + // imod == '00' && M == '0' --> this is a HINT instruction + int imm = fieldFromInstruction(Insn, 0, 8); + // HINT are defined only for immediate in [0..4] + if(imm > 4) return MCDisassembler::Fail; + Inst.setOpcode(ARM::t2HINT); + Inst.addOperand(MCOperand::CreateImm(imm)); } return S; |