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| author | Jim Grosbach <grosbach@apple.com> | 2011-04-05 18:40:13 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-04-05 18:40:13 +0000 |
| commit | 215e4fdbf9da460cb5e2d42a8df96530534ec382 (patch) | |
| tree | 3521b95fcdc74e2070495bf71ede92666439ff0f /lib/Target/ARM/Disassembler | |
| parent | 7a8e6c5fb2e17da86d5caacb41d57061de47a97d (diff) | |
| download | external_llvm-215e4fdbf9da460cb5e2d42a8df96530534ec382.zip external_llvm-215e4fdbf9da460cb5e2d42a8df96530534ec382.tar.gz external_llvm-215e4fdbf9da460cb5e2d42a8df96530534ec382.tar.bz2 | |
Make second source operand of LDRD pre/post explicit.
Finish what r128736 started.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128903 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp index dc36601..993ff73 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp @@ -1232,8 +1232,6 @@ static bool DisassembleLdStMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn, ++OpIdx; } - bool DualReg = HasDualReg(Opcode); - // Disassemble the dst/src operand. if (OpIdx >= NumOps) return false; @@ -1244,9 +1242,8 @@ static bool DisassembleLdStMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn, decodeRd(insn)))); ++OpIdx; - // Fill in LDRD and STRD's second operand, but only if it's offset mode OR we - // have a pre-or-post-indexed store operation. - if (DualReg && (!isPrePost || isStore)) { + // Fill in LDRD and STRD's second operand Rt operand. + if (HasDualReg(Opcode)) { MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID, decodeRd(insn) + 1))); ++OpIdx; |