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author | Jim Grosbach <grosbach@apple.com> | 2011-08-18 16:57:50 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2011-08-18 16:57:50 +0000 |
commit | 90b5a08e1ffc4a1c18f7fa964ca561fa4b03c314 (patch) | |
tree | a64916461354bcaf8ab4afc8d4a8d7d7df12fdba /lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | |
parent | 5f687decc84318b5997e38e7b2c540dde7af8141 (diff) | |
download | external_llvm-90b5a08e1ffc4a1c18f7fa964ca561fa4b03c314.zip external_llvm-90b5a08e1ffc4a1c18f7fa964ca561fa4b03c314.tar.gz external_llvm-90b5a08e1ffc4a1c18f7fa964ca561fa4b03c314.tar.bz2 |
ARM Thumb blx instruction fixup has same data range as bl.
These fixups are handled poorly in general, and should have a single
contiguous range of bits per fixup type, but that's not how they're
currently organized, so for now in complex ones like for blx, we just tell the
emitter it's OK for the fixup to munge any bit it wants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137947 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp')
-rw-r--r-- | lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp index 9b4d251..89b5ace 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -77,7 +77,7 @@ public: { "fixup_t2_uncondbranch", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_br", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, -{ "fixup_arm_thumb_blx", 7, 21, MCFixupKindInfo::FKF_IsPCRel }, +{ "fixup_arm_thumb_blx", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_cb", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_cp", 1, 8, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_bcc", 0, 8, MCFixupKindInfo::FKF_IsPCRel }, |