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authorJim Grosbach <grosbach@apple.com>2011-12-19 23:06:24 +0000
committerJim Grosbach <grosbach@apple.com>2011-12-19 23:06:24 +0000
commit2f196747f15240691bd4e622f7995edfedf90f61 (patch)
tree431c8af23262069662095a53fbc9a80f5c780a9b /lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h
parent8787c5f24e175a36f645784d533384f9f7cd86fc (diff)
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ARM assembly parsing and encoding support for LDRD(label).
rdar://9932658 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146921 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h')
-rw-r--r--lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h b/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h
index 350c92d..4b2726f 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h
+++ b/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h
@@ -23,6 +23,9 @@ enum Fixups {
// the 16-bit halfwords reordered.
fixup_t2_ldst_pcrel_12,
+ // fixup_arm_pcrel_10_unscaled - 10-bit PC relative relocation for symbol
+ // addresses used in LDRD/LDRH/LDRB/etc. instructions. All bits are encoded.
+ fixup_arm_pcrel_10_unscaled,
// fixup_arm_pcrel_10 - 10-bit PC relative relocation for symbol addresses
// used in VFP instructions where the lower 2 bits are not encoded
// (so it's encoded as an 8-bit immediate).