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authorEvan Cheng <evan.cheng@apple.com>2007-03-09 19:35:33 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-03-09 19:35:33 +0000
commit44f4fca3c02da1c3c90e99af08692003fabf2e45 (patch)
treea23632e87d1148027f8f3000e3857184bd4cec83 /lib/Target/ARM/README.txt
parent2265b491931554eb59edfa1c2cfbda64b2e5de1b (diff)
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Add comments about LSR / ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/README.txt')
-rw-r--r--lib/Target/ARM/README.txt4
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/ARM/README.txt b/lib/Target/ARM/README.txt
index f0f4d51..940db16 100644
--- a/lib/Target/ARM/README.txt
+++ b/lib/Target/ARM/README.txt
@@ -463,3 +463,7 @@ More register scavenging work:
resulting live interval is not assigned a physical register. It may be
possible (with the help of the scavenger) to turn some spill / restore
pairs into register copies.
+
+//===---------------------------------------------------------------------===//
+
+Teach LSR about ARM addressing modes.