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| author | Jim Grosbach <grosbach@apple.com> | 2009-10-19 22:27:30 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2009-10-19 22:27:30 +0000 |
| commit | d482f55af135081aee7f7ab972bb8973f189c88f (patch) | |
| tree | ab7c243668857e2eeed65a76d0a565783c224de8 /lib/Target/ARM/Thumb1RegisterInfo.h | |
| parent | 4d1522234192704f45dfd2527c2913fa60be616e (diff) | |
| download | external_llvm-d482f55af135081aee7f7ab972bb8973f189c88f.zip external_llvm-d482f55af135081aee7f7ab972bb8973f189c88f.tar.gz external_llvm-d482f55af135081aee7f7ab972bb8973f189c88f.tar.bz2 | |
Adjust the scavenge register spilling to allow the target to choose an
appropriate restore location for the spill as well as perform the actual
save and restore.
The Thumb1 target uses this to make sure R12 is not clobbered while a spilled
scavenger register is live there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84554 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb1RegisterInfo.h')
| -rw-r--r-- | lib/Target/ARM/Thumb1RegisterInfo.h | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/lib/Target/ARM/Thumb1RegisterInfo.h b/lib/Target/ARM/Thumb1RegisterInfo.h index bb7a619..570a5bc 100644 --- a/lib/Target/ARM/Thumb1RegisterInfo.h +++ b/lib/Target/ARM/Thumb1RegisterInfo.h @@ -57,12 +57,9 @@ public: bool saveScavengerRegister(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, + MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, unsigned Reg) const; - void restoreScavengerRegister(MachineBasicBlock &MBB, - MachineBasicBlock::iterator I, - const TargetRegisterClass *RC, - unsigned Reg) const; unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, int *Value = NULL, RegScavenger *RS = NULL) const; |