diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-11 06:33:54 +0000 |
---|---|---|
committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-11 06:33:54 +0000 |
commit | ac2736670034e8942939b9fccf8e4618a0bda908 (patch) | |
tree | fdfade1f718ed8c4bd70b7193911deb7dd659c06 /lib/Target/ARM/Thumb2InstrInfo.cpp | |
parent | 629d80742ac8b1e28b094befb7cc17671b9fc857 (diff) | |
download | external_llvm-ac2736670034e8942939b9fccf8e4618a0bda908.zip external_llvm-ac2736670034e8942939b9fccf8e4618a0bda908.tar.gz external_llvm-ac2736670034e8942939b9fccf8e4618a0bda908.tar.bz2 |
Replace copyRegToReg with copyPhysReg for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108078 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb2InstrInfo.cpp')
-rw-r--r-- | lib/Target/ARM/Thumb2InstrInfo.cpp | 46 |
1 files changed, 19 insertions, 27 deletions
diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp index 7e2814f..ee51727 100644 --- a/lib/Target/ARM/Thumb2InstrInfo.cpp +++ b/lib/Target/ARM/Thumb2InstrInfo.cpp @@ -120,34 +120,26 @@ isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumT, NumT <= (IfCvtDiamondLimit) && NumF <= (IfCvtDiamondLimit); } -bool -Thumb2InstrInfo::copyRegToReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator I, - unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC, - DebugLoc DL) const { - if (DestRC == ARM::GPRRegisterClass || DestRC == ARM::tcGPRRegisterClass) { - if (SrcRC == ARM::GPRRegisterClass || SrcRC == ARM::tcGPRRegisterClass) { - BuildMI(MBB, I, DL, get(ARM::tMOVgpr2gpr), DestReg).addReg(SrcReg); - return true; - } else if (SrcRC == ARM::tGPRRegisterClass) { - BuildMI(MBB, I, DL, get(ARM::tMOVtgpr2gpr), DestReg).addReg(SrcReg); - return true; - } - } else if (DestRC == ARM::tGPRRegisterClass) { - if (SrcRC == ARM::GPRRegisterClass || SrcRC == ARM::tcGPRRegisterClass) { - BuildMI(MBB, I, DL, get(ARM::tMOVgpr2tgpr), DestReg).addReg(SrcReg); - return true; - } else if (SrcRC == ARM::tGPRRegisterClass) { - BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg).addReg(SrcReg); - return true; - } - } - +void Thumb2InstrInfo::copyPhysReg(MachineBasicBlock &MBB, + MachineBasicBlock::iterator I, DebugLoc DL, + unsigned DestReg, unsigned SrcReg, + bool KillSrc) const { // Handle SPR, DPR, and QPR copies. - return ARMBaseInstrInfo::copyRegToReg(MBB, I, DestReg, SrcReg, DestRC, - SrcRC, DL); + if (!ARM::GPRRegClass.contains(DestReg, SrcReg)) + return ARMBaseInstrInfo::copyPhysReg(MBB, I, DL, DestReg, SrcReg, KillSrc); + + bool tDest = ARM::tGPRRegClass.contains(DestReg); + bool tSrc = ARM::tGPRRegClass.contains(SrcReg); + unsigned Opc = ARM::tMOVgpr2gpr; + if (tDest && tSrc) + Opc = ARM::tMOVr; + else if (tSrc) + Opc = ARM::tMOVtgpr2gpr; + else if (tDest) + Opc = ARM::tMOVgpr2tgpr; + + BuildMI(MBB, I, DL, get(Opc), DestReg) + .addReg(SrcReg, getKillRegState(KillSrc)); } void Thumb2InstrInfo:: |