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author | Jim Grosbach <grosbach@apple.com> | 2009-09-11 20:13:17 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2009-09-11 20:13:17 +0000 |
commit | 5b01f934c23227abf954e317b5b65cc77f38c21d (patch) | |
tree | 29733bae380638d681c2175d5bfbcafb1d15e490 /lib/Target/ARM | |
parent | 21f15abfa99b786925bb1b36717b454ac800251b (diff) | |
download | external_llvm-5b01f934c23227abf954e317b5b65cc77f38c21d.zip external_llvm-5b01f934c23227abf954e317b5b65cc77f38c21d.tar.gz external_llvm-5b01f934c23227abf954e317b5b65cc77f38c21d.tar.bz2 |
Revert array initialization regclass change so that the initialization stays static, not runtime.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81560 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
-rw-r--r-- | lib/Target/ARM/ARMBaseRegisterInfo.cpp | 44 |
1 files changed, 20 insertions, 24 deletions
diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 908819c..ca3e509 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -164,46 +164,42 @@ ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { const TargetRegisterClass* const * ARMBaseRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const { static const TargetRegisterClass * const CalleeSavedRegClasses[] = { - ARM::GPRRegisterClass, ARM::GPRRegisterClass, ARM::GPRRegisterClass, - ARM::GPRRegisterClass, ARM::GPRRegisterClass, ARM::GPRRegisterClass, - ARM::GPRRegisterClass, ARM::GPRRegisterClass, ARM::GPRRegisterClass, + &ARM::GPRRegClass, &ARM::GPRRegClass, &ARM::GPRRegClass, + &ARM::GPRRegClass, &ARM::GPRRegClass, &ARM::GPRRegClass, + &ARM::GPRRegClass, &ARM::GPRRegClass, &ARM::GPRRegClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, ARM::DPRRegisterClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, ARM::DPRRegisterClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, + &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, + &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, 0 }; static const TargetRegisterClass * const ThumbCalleeSavedRegClasses[] = { - ARM::GPRRegisterClass, ARM::GPRRegisterClass, ARM::GPRRegisterClass, - ARM::GPRRegisterClass, ARM::GPRRegisterClass, ARM::tGPRRegisterClass, - ARM::tGPRRegisterClass,ARM::tGPRRegisterClass,ARM::tGPRRegisterClass, + &ARM::GPRRegClass, &ARM::GPRRegClass, &ARM::GPRRegClass, + &ARM::GPRRegClass, &ARM::GPRRegClass, &ARM::tGPRRegClass, + &ARM::tGPRRegClass,&ARM::tGPRRegClass,&ARM::tGPRRegClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, ARM::DPRRegisterClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, ARM::DPRRegisterClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, + &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, + &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, 0 }; static const TargetRegisterClass * const DarwinCalleeSavedRegClasses[] = { - ARM::GPRRegisterClass, ARM::GPRRegisterClass, ARM::GPRRegisterClass, - ARM::GPRRegisterClass, ARM::GPRRegisterClass, ARM::GPRRegisterClass, - ARM::GPRRegisterClass, ARM::GPRRegisterClass, + &ARM::GPRRegClass, &ARM::GPRRegClass, &ARM::GPRRegClass, + &ARM::GPRRegClass, &ARM::GPRRegClass, &ARM::GPRRegClass, + &ARM::GPRRegClass, &ARM::GPRRegClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, ARM::DPRRegisterClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, ARM::DPRRegisterClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, + &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, + &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, 0 }; static const TargetRegisterClass * const DarwinThumbCalleeSavedRegClasses[] ={ - ARM::GPRRegisterClass, ARM::tGPRRegisterClass, ARM::tGPRRegisterClass, - ARM::tGPRRegisterClass, ARM::tGPRRegisterClass, ARM::GPRRegisterClass, - ARM::GPRRegisterClass, ARM::GPRRegisterClass, + &ARM::GPRRegClass, &ARM::tGPRRegClass, &ARM::tGPRRegClass, + &ARM::tGPRRegClass, &ARM::tGPRRegClass, &ARM::GPRRegClass, + &ARM::GPRRegClass, &ARM::GPRRegClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, ARM::DPRRegisterClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, ARM::DPRRegisterClass, - ARM::DPRRegisterClass, ARM::DPRRegisterClass, + &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, + &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, &ARM::DPRRegClass, 0 }; |