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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-16 22:35:46 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-16 22:35:46 +0000 |
commit | 78e6e009223a38739797629ca2d217acf86dda93 (patch) | |
tree | 75935c3cf8e6533ddac2b69d9f406335d165d772 /lib/Target/ARM | |
parent | 2aaa98da767ffd07e773a228bcae4adf65c49bc5 (diff) | |
download | external_llvm-78e6e009223a38739797629ca2d217acf86dda93.zip external_llvm-78e6e009223a38739797629ca2d217acf86dda93.tar.gz external_llvm-78e6e009223a38739797629ca2d217acf86dda93.tar.bz2 |
Remove the isMoveInstr() hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108567 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
-rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 42 | ||||
-rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.h | 6 |
2 files changed, 0 insertions, 48 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 7d19666..a85a8e2 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -573,48 +573,6 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { return 0; // Not reached } -/// Return true if the instruction is a register to register move and -/// leave the source and dest operands in the passed parameters. -/// -bool -ARMBaseInstrInfo::isMoveInstr(const MachineInstr &MI, - unsigned &SrcReg, unsigned &DstReg, - unsigned& SrcSubIdx, unsigned& DstSubIdx) const { - switch (MI.getOpcode()) { - default: break; - case ARM::VMOVS: - case ARM::VMOVD: - case ARM::VMOVDneon: - case ARM::VMOVQ: - case ARM::VMOVQQ : { - SrcReg = MI.getOperand(1).getReg(); - DstReg = MI.getOperand(0).getReg(); - SrcSubIdx = MI.getOperand(1).getSubReg(); - DstSubIdx = MI.getOperand(0).getSubReg(); - return true; - } - case ARM::MOVr: - case ARM::MOVr_TC: - case ARM::tMOVr: - case ARM::tMOVgpr2tgpr: - case ARM::tMOVtgpr2gpr: - case ARM::tMOVgpr2gpr: - case ARM::t2MOVr: { - assert(MI.getDesc().getNumOperands() >= 2 && - MI.getOperand(0).isReg() && - MI.getOperand(1).isReg() && - "Invalid ARM MOV instruction"); - SrcReg = MI.getOperand(1).getReg(); - DstReg = MI.getOperand(0).getReg(); - SrcSubIdx = MI.getOperand(1).getSubReg(); - DstSubIdx = MI.getOperand(0).getSubReg(); - return true; - } - } - - return false; -} - unsigned ARMBaseInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const { diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h index 89a2db7..7b6f329 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/lib/Target/ARM/ARMBaseInstrInfo.h @@ -262,12 +262,6 @@ public: /// virtual unsigned GetInstSizeInBytes(const MachineInstr* MI) const; - /// Return true if the instruction is a register to register move and return - /// the source and dest operands and their sub-register indices by reference. - virtual bool isMoveInstr(const MachineInstr &MI, - unsigned &SrcReg, unsigned &DstReg, - unsigned &SrcSubIdx, unsigned &DstSubIdx) const; - virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const; virtual unsigned isStoreToStackSlot(const MachineInstr *MI, |