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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-01-20 18:32:09 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-01-20 18:32:09 +0000 |
| commit | 8dd37f7b7dca7907f9f070dc96359f242e102163 (patch) | |
| tree | a16b89419569644b41994c3b40ba34760b64222b /lib/Target/ARM | |
| parent | 163b5d23ab99e752f6e24cdf413adb8c8067f398 (diff) | |
| download | external_llvm-8dd37f7b7dca7907f9f070dc96359f242e102163.zip external_llvm-8dd37f7b7dca7907f9f070dc96359f242e102163.tar.gz external_llvm-8dd37f7b7dca7907f9f070dc96359f242e102163.tar.bz2 | |
Add cdp/cdp2 instructions for thumb/thumb2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123929 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 25 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 25 | ||||
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 |
3 files changed, 51 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 406d8db..6dc07eb 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -1378,6 +1378,31 @@ def tMCRR : tMovRRCopro<"mcrr", 0 /* from ARM core register to coprocessor */>; def tMRRC : tMovRRCopro<"mrrc", 1 /* from coprocessor to ARM core register */>; //===----------------------------------------------------------------------===// +// Other Coprocessor Instructions. For disassembly only. +// +def tCDP : T1Cop<(outs), (ins p_imm:$cop, i32imm:$opc1, + c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, i32imm:$opc2), + "cdp\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2", + [/* For disassembly only; pattern left blank */]> { + let Inst{27-24} = 0b1110; + + bits<4> opc1; + bits<4> CRn; + bits<4> CRd; + bits<4> cop; + bits<3> opc2; + bits<4> CRm; + + let Inst{3-0} = CRm; + let Inst{4} = 0; + let Inst{7-5} = opc2; + let Inst{11-8} = cop; + let Inst{15-12} = CRd; + let Inst{19-16} = CRn; + let Inst{23-20} = opc1; +} + +//===----------------------------------------------------------------------===// // TLS Instructions // diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 8fb5eeb..7cac569 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -3378,3 +3378,28 @@ class t2MovRRCopro<string opc, bit direction> def t2MCRR : t2MovRRCopro<"mcrr2",0/* from ARM core register to coprocessor */>; def t2MRRC : t2MovRRCopro<"mrrc2",1/* from coprocessor to ARM core register */>; +//===----------------------------------------------------------------------===// +// Other Coprocessor Instructions. For disassembly only. +// + +def t2CDP2 : T2Cop<(outs), (ins p_imm:$cop, i32imm:$opc1, + c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, i32imm:$opc2), + "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2", + [/* For disassembly only; pattern left blank */]> { + let Inst{27-24} = 0b1110; + + bits<4> opc1; + bits<4> CRn; + bits<4> CRd; + bits<4> cop; + bits<3> opc2; + bits<4> CRm; + + let Inst{3-0} = CRm; + let Inst{4} = 0; + let Inst{7-5} = opc2; + let Inst{11-8} = cop; + let Inst{15-12} = CRd; + let Inst{19-16} = CRn; + let Inst{23-20} = opc1; +} diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index a10e158..ee6ef2b 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -1202,7 +1202,7 @@ GetMnemonicAcceptInfo(StringRef Mnemonic, bool &CanAcceptCarrySet, if (isThumb) if (Mnemonic == "bkpt" || Mnemonic == "mcr" || Mnemonic == "mcrr" || - Mnemonic == "mrc" || Mnemonic == "mrrc") + Mnemonic == "mrc" || Mnemonic == "mrrc" || Mnemonic == "cdp") CanAcceptPredicationCode = false; } |