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authorEli Friedman <eli.friedman@gmail.com>2010-06-26 04:36:50 +0000
committerEli Friedman <eli.friedman@gmail.com>2010-06-26 04:36:50 +0000
commita2c6f457a4954d8e38b4c2c69b011cdfa123ad02 (patch)
tree52a7b1aac1feed068c9adf92675526e62b854a2f /lib/Target/ARM
parentccd9bcca14e7046b7078cdf472a9185b86cdf07d (diff)
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Followup to r106770: actually generate SXTB and SXTH for sign-extensions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106940 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp7
1 files changed, 2 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index d7648b3..6dfb606 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -459,11 +459,8 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i64, Expand);
setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i64, Expand);
- // If the subtarget does not have extract instructions, sign_extend_inreg
- // needs to be expanded. Extract is available in ARM mode on v6 and up,
- // and on most Thumb2 implementations.
- if (!Subtarget->hasV6Ops()
- || (Subtarget->isThumb2() && !Subtarget->hasT2ExtractPack())) {
+ // Requires SXTB/SXTH, available on v6 and up in both ARM and Thumb modes.
+ if (!Subtarget->hasV6Ops()) {
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8, Expand);
}