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authorJim Grosbach <grosbach@apple.com>2011-12-13 21:06:41 +0000
committerJim Grosbach <grosbach@apple.com>2011-12-13 21:06:41 +0000
commitd7ea73a4909fc3200a1cecd2b420d7ace2180b70 (patch)
treeb04a1efc5ebdd323eb63bb2028de2a1fa8d187d8 /lib/Target/ARM
parent55b02f28c1a2960ebb88cf5019cc5b36bb2eabf4 (diff)
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Thumb2 tweak for ccout handling in RSB parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146516 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index f682780..643ba71 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -4737,8 +4737,11 @@ bool ARMAsmParser::ParseInstruction(StringRef Name, SMLoc NameLoc,
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Op->getImm());
if (CE && CE->getValue() == 0 &&
(isThumbOne() ||
+ // The cc_out operand matches the IT block.
+ ((inITBlock() != CarrySetting) &&
+ // Neither register operand is a high register.
(isARMLowRegister(static_cast<ARMOperand*>(Operands[3])->getReg()) &&
- isARMLowRegister(static_cast<ARMOperand*>(Operands[4])->getReg())))) {
+ isARMLowRegister(static_cast<ARMOperand*>(Operands[4])->getReg()))))){
Operands.erase(Operands.begin() + 5);
Operands.push_back(ARMOperand::CreateToken("#0", Op->getStartLoc()));
delete Op;