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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-01-18 21:31:35 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-01-18 21:31:35 +0000 |
| commit | e7255a80e308c7f67d25b0b247ed791a99ea3a4e (patch) | |
| tree | efe0f6d5172dba1395a047c02db03b618b33e26d /lib/Target/ARM | |
| parent | 892fc6d7b64364b230261daa967518a71748c01b (diff) | |
| download | external_llvm-e7255a80e308c7f67d25b0b247ed791a99ea3a4e.zip external_llvm-e7255a80e308c7f67d25b0b247ed791a99ea3a4e.tar.gz external_llvm-e7255a80e308c7f67d25b0b247ed791a99ea3a4e.tar.bz2 | |
Fix MRS encoding for arm and thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123778 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 12 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 1 |
2 files changed, 9 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 15949c0..dbc4d9d 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -3827,15 +3827,19 @@ def MRRC2 : ABXI<0b1100, (outs), (ins p_imm:$cop, i32imm:$opc, // Move between special register and ARM core register -- for disassembly only // -def MRS : ABI<0b0001,(outs GPR:$dst),(ins), NoItinerary, "mrs", "\t$dst, cpsr", +def MRS : ABI<0b0001, (outs GPR:$Rd), (ins), NoItinerary, "mrs", "\t$Rd, cpsr", [/* For disassembly only; pattern left blank */]> { - let Inst{23-20} = 0b0000; + bits<4> Rd; + let Inst{23-16} = 0b00001111; + let Inst{15-12} = Rd; let Inst{7-4} = 0b0000; } -def MRSsys : ABI<0b0001,(outs GPR:$dst),(ins), NoItinerary,"mrs","\t$dst, spsr", +def MRSsys : ABI<0b0001, (outs GPR:$Rd), (ins), NoItinerary,"mrs","\t$Rd, spsr", [/* For disassembly only; pattern left blank */]> { - let Inst{23-20} = 0b0100; + bits<4> Rd; + let Inst{23-16} = 0b01001111; + let Inst{15-12} = Rd; let Inst{7-4} = 0b0000; } diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 98e587a..7793917 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -3290,6 +3290,7 @@ class T2MRS<bits<12> op31_20, bits<2> op15_14, bits<1> op12, : T2SpecialReg<op31_20, op15_14, op12, oops, iops, itin, opc, asm, pattern> { bits<4> Rd; let Inst{11-8} = Rd; + let Inst{19-16} = 0b1111; } def t2MRS : T2MRS<0b111100111110, 0b10, 0, |