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authorAndrew Lenharth <andrewl@lenharth.org>2008-10-07 02:10:26 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2008-10-07 02:10:26 +0000
commit1b19ef029574592ae25c42fdbc58987e3e2e6476 (patch)
tree0afe472172400cf38a7e2f4f29a7eb8db1f12b6b /lib/Target/Alpha/AlphaISelDAGToDAG.cpp
parente4a424590675cf32b729420665626774b01b114d (diff)
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Note that ADDC and company don't actually expand yet (missing in legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57226 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelDAGToDAG.cpp')
-rw-r--r--lib/Target/Alpha/AlphaISelDAGToDAG.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index 07a0ae2..b243da6 100644
--- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -323,7 +323,8 @@ SDNode *AlphaDAGToDAGISel::Select(SDValue Op) {
return CurDAG->SelectNodeTo(N, Alpha::LDQr, MVT::i64, MVT::Other,
CPI, SDValue(Tmp, 0), CurDAG->getEntryNode());
}
- case ISD::TargetConstantFP: {
+ case ISD::TargetConstantFP:
+ case ISD::ConstantFP: {
ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);
bool isDouble = N->getValueType(0) == MVT::f64;
MVT T = isDouble ? MVT::f64 : MVT::f32;