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authorDan Gohman <gohman@apple.com>2008-10-03 16:55:19 +0000
committerDan Gohman <gohman@apple.com>2008-10-03 16:55:19 +0000
commitda8ac5fd9130b70b61be61e4819faa8d842d708f (patch)
treef5cd677e4925c97b3acedfa9cb18693a5429a162 /lib/Target/Alpha/AlphaISelDAGToDAG.cpp
parent38217fef57de72064ba74a165cf100d785dfcad0 (diff)
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Avoid creating two TargetLowering objects for each target.
Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelDAGToDAG.cpp')
-rw-r--r--lib/Target/Alpha/AlphaISelDAGToDAG.cpp5
1 files changed, 1 insertions, 4 deletions
diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index 8b298db..07a0ae2 100644
--- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -40,8 +40,6 @@ namespace {
/// AlphaDAGToDAGISel - Alpha specific code to select Alpha machine
/// instructions for SelectionDAG operations.
class AlphaDAGToDAGISel : public SelectionDAGISel {
- AlphaTargetLowering AlphaLowering;
-
static const int64_t IMM_LOW = -32768;
static const int64_t IMM_HIGH = 32767;
static const int64_t IMM_MULT = 65536;
@@ -147,8 +145,7 @@ namespace {
public:
explicit AlphaDAGToDAGISel(AlphaTargetMachine &TM)
- : SelectionDAGISel(AlphaLowering),
- AlphaLowering(*TM.getTargetLowering())
+ : SelectionDAGISel(*TM.getTargetLowering())
{}
/// getI64Imm - Return a target constant with the specified value, of type