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author | Dan Gohman <gohman@apple.com> | 2008-01-31 00:25:39 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-01-31 00:25:39 +0000 |
commit | c6c391daddbafa722d9ca87d18f204e9a6e617a3 (patch) | |
tree | ebae42fec638dc822a87e16b66f0796bfda5040c /lib/Target/Alpha/AlphaISelLowering.cpp | |
parent | 294e6524916aecd874dddeede4cc074d31f5f59f (diff) | |
download | external_llvm-c6c391daddbafa722d9ca87d18f204e9a6e617a3.zip external_llvm-c6c391daddbafa722d9ca87d18f204e9a6e617a3.tar.gz external_llvm-c6c391daddbafa722d9ca87d18f204e9a6e617a3.tar.bz2 |
Create a new class, MemOperand, for describing memory references
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46585 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelLowering.cpp')
-rw-r--r-- | lib/Target/Alpha/AlphaISelLowering.cpp | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp index c359a5b..d20e1f7 100644 --- a/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/lib/Target/Alpha/AlphaISelLowering.cpp @@ -491,10 +491,9 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { case ISD::VAARG: { SDOperand Chain = Op.getOperand(0); SDOperand VAListP = Op.getOperand(1); - SrcValueSDNode *VAListS = cast<SrcValueSDNode>(Op.getOperand(2)); + const Value *VAListS = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); - SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS->getValue(), - VAListS->getOffset()); + SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS, 0); SDOperand Tmp = DAG.getNode(ISD::ADD, MVT::i64, VAListP, DAG.getConstant(8, MVT::i64)); SDOperand Offset = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Base.getValue(1), @@ -527,13 +526,11 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { SDOperand Chain = Op.getOperand(0); SDOperand DestP = Op.getOperand(1); SDOperand SrcP = Op.getOperand(2); - SrcValueSDNode *DestS = cast<SrcValueSDNode>(Op.getOperand(3)); - SrcValueSDNode *SrcS = cast<SrcValueSDNode>(Op.getOperand(4)); + const Value *DestS = cast<SrcValueSDNode>(Op.getOperand(3))->getValue(); + const Value *SrcS = cast<SrcValueSDNode>(Op.getOperand(4))->getValue(); - SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP, - SrcS->getValue(), SrcS->getOffset()); - SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS->getValue(), - DestS->getOffset()); + SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP, SrcS, 0); + SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS, 0); SDOperand NP = DAG.getNode(ISD::ADD, MVT::i64, SrcP, DAG.getConstant(8, MVT::i64)); Val = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Result, NP, NULL,0, MVT::i32); @@ -544,12 +541,11 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { case ISD::VASTART: { SDOperand Chain = Op.getOperand(0); SDOperand VAListP = Op.getOperand(1); - SrcValueSDNode *VAListS = cast<SrcValueSDNode>(Op.getOperand(2)); + const Value *VAListS = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); // vastart stores the address of the VarArgsBase and VarArgsOffset SDOperand FR = DAG.getFrameIndex(VarArgsBase, MVT::i64); - SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS->getValue(), - VAListS->getOffset()); + SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS, 0); SDOperand SA2 = DAG.getNode(ISD::ADD, MVT::i64, VAListP, DAG.getConstant(8, MVT::i64)); return DAG.getTruncStore(S1, DAG.getConstant(VarArgsOffset, MVT::i64), |