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author | Andrew Lenharth <andrewl@lenharth.org> | 2005-01-22 23:41:55 +0000 |
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committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-01-22 23:41:55 +0000 |
commit | 304d0f307627e79dba901615650d422b656146d6 (patch) | |
tree | 70c7f130c638fbce392582fcfd35b846c667557e /lib/Target/Alpha/AlphaInstrInfo.h | |
parent | 68cd65ea689907fb8a4aa80d72d182921e94607f (diff) | |
download | external_llvm-304d0f307627e79dba901615650d422b656146d6.zip external_llvm-304d0f307627e79dba901615650d422b656146d6.tar.gz external_llvm-304d0f307627e79dba901615650d422b656146d6.tar.bz2 |
Let me introduce you to the early stages of the llvm backend for the alpha processor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19764 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaInstrInfo.h')
-rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.h b/lib/Target/Alpha/AlphaInstrInfo.h new file mode 100644 index 0000000..921528e --- /dev/null +++ b/lib/Target/Alpha/AlphaInstrInfo.h @@ -0,0 +1,42 @@ +//===- AlphaInstrInfo.h - Alpha Instruction Information -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the Alpha implementation of the TargetInstrInfo class. +// +//===----------------------------------------------------------------------===// + +#ifndef ALPHAINSTRUCTIONINFO_H +#define ALPHAINSTRUCTIONINFO_H + +#include "llvm/Target/TargetInstrInfo.h" +#include "AlphaRegisterInfo.h" + +namespace llvm { + +class AlphaInstrInfo : public TargetInstrInfo { + const AlphaRegisterInfo RI; +public: + AlphaInstrInfo(); + + /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As + /// such, whenever a client has an instance of instruction info, it should + /// always be able to get register info as well (through this method). + /// + virtual const MRegisterInfo &getRegisterInfo() const { return RI; } + + /// Return true if the instruction is a register to register move and + /// leave the source and dest operands in the passed parameters. + /// + virtual bool isMoveInstr(const MachineInstr &MI, + unsigned &SrcReg, unsigned &DstReg) const; +}; + +} + +#endif |