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author | Andrew Lenharth <andrewl@lenharth.org> | 2005-06-23 23:42:05 +0000 |
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committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-06-23 23:42:05 +0000 |
commit | 3f5aa1cd8c8aed26b7feaac6ce7c12e891daa1a2 (patch) | |
tree | 77f4021634489e1c83f377deb2c24ec4d537c2c9 /lib/Target/Alpha/AlphaRegisterInfo.cpp | |
parent | a9e39e28b79d47d2a6e612e84cd85057cd590bac (diff) | |
download | external_llvm-3f5aa1cd8c8aed26b7feaac6ce7c12e891daa1a2.zip external_llvm-3f5aa1cd8c8aed26b7feaac6ce7c12e891daa1a2.tar.gz external_llvm-3f5aa1cd8c8aed26b7feaac6ce7c12e891daa1a2.tar.bz2 |
remove a pseudo instruction, make ret always right, and fix vararg chains
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22276 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaRegisterInfo.cpp')
-rw-r--r-- | lib/Target/Alpha/AlphaRegisterInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp index 7938a59..f05c115 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -272,7 +272,7 @@ void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF, const MachineFrameInfo *MFI = MF.getFrameInfo(); MachineBasicBlock::iterator MBBI = prior(MBB.end()); MachineInstr *MI; - assert((MBBI->getOpcode() == Alpha::RET || MBBI->getOpcode() == Alpha::RETURN) + assert((MBBI->getOpcode() == Alpha::RET) && "Can only insert epilog into returning blocks"); bool FP = hasFP(MF); |