diff options
| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-06 21:07:31 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-06 21:07:31 +0000 |
| commit | 2c9e38c285bc005b935114b99fe5bc1b44f04a7d (patch) | |
| tree | bf92ed5eb9121721c50bbc607bf32a6ca1ad33c1 /lib/Target/Alpha/AlphaRegisterInfo.td | |
| parent | 6583890c2b4479e2f207b1e4fd9713ad65ddb739 (diff) | |
| download | external_llvm-2c9e38c285bc005b935114b99fe5bc1b44f04a7d.zip external_llvm-2c9e38c285bc005b935114b99fe5bc1b44f04a7d.tar.gz external_llvm-2c9e38c285bc005b935114b99fe5bc1b44f04a7d.tar.bz2 | |
prefer FP scratch registers and more check in LowerArguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20057 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaRegisterInfo.td')
| -rw-r--r-- | lib/Target/Alpha/AlphaRegisterInfo.td | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.td b/lib/Target/Alpha/AlphaRegisterInfo.td index bdded10..46491c1 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.td +++ b/lib/Target/Alpha/AlphaRegisterInfo.td @@ -86,8 +86,11 @@ def GPRC : RegisterClass<i64, 64, //Don't allocate 15, 29, 30, 31 //Allocation volatiles only for now -def FPRC : RegisterClass<f64, 64, [F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, - F10, F11, F12, F13, F14, F15, F16, F17, F18, F19, - F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30]>; +def FPRC : RegisterClass<f64, 64, [F0, F1, + F10, F11, F12, F13, F14, F15, F16, F17, F18, F19, + F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30, + //Saved: + F2, F3, F4, F5, F6, F7, F8, F9 + ]>; |