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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-02 17:01:31 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-02 17:01:31 +0000 |
| commit | ddfacc35d9db62912919d1f261b9fbbdc8164464 (patch) | |
| tree | 3880a7001a84d2ce1dbc267d0bfcefd30b701304 /lib/Target/Alpha/AlphaRegisterInfo.td | |
| parent | 879ef22bdb9ef7296957f58f89c49acc04f3d2e0 (diff) | |
| download | external_llvm-ddfacc35d9db62912919d1f261b9fbbdc8164464.zip external_llvm-ddfacc35d9db62912919d1f261b9fbbdc8164464.tar.gz external_llvm-ddfacc35d9db62912919d1f261b9fbbdc8164464.tar.bz2 | |
oops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20003 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaRegisterInfo.td')
| -rw-r--r-- | lib/Target/Alpha/AlphaRegisterInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.td b/lib/Target/Alpha/AlphaRegisterInfo.td index 4165002..fd965de 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.td +++ b/lib/Target/Alpha/AlphaRegisterInfo.td @@ -81,7 +81,7 @@ def GPRC : RegisterClass<i64, 64, //Volitle [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R27, //Non-Volitile - R9, R10, R11, R12, R13, R14, R15, R26, /*R28,*/ R29, /* R30, R31*/ ]>; + R9, R10, R11, R12, R13, R14, R15, R26, /* R28, */ R29 /* R30, R31*/ ]>; //R28 is reserved for the assembler //Don't allocate 15, 29, 30, 31 |