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authorEli Friedman <eli.friedman@gmail.com>2010-08-01 21:13:28 +0000
committerEli Friedman <eli.friedman@gmail.com>2010-08-01 21:13:28 +0000
commit348e02600ef0191b4e0621078fc81f935065c1f7 (patch)
treed25e69260e9cb01bfdda68dc666f18bed3ae802d /lib/Target/Alpha
parentad2b04c07f7e7abf7a57c7edf779df3e476d3da3 (diff)
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PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually
improves the generated code in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109985 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha')
-rw-r--r--lib/Target/Alpha/AlphaISelDAGToDAG.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index d526dc0..d197bd1 100644
--- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -113,8 +113,8 @@ namespace {
static uint64_t getNearPower2(uint64_t x) {
if (!x) return 0;
unsigned at = CountLeadingZeros_64(x);
- uint64_t complow = 1 << (63 - at);
- uint64_t comphigh = 1 << (64 - at);
+ uint64_t complow = 1ULL << (63 - at);
+ uint64_t comphigh = 1ULL << (64 - at);
//cerr << x << ":" << complow << ":" << comphigh << "\n";
if (abs64(complow - x) <= abs64(comphigh - x))
return complow;