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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-10 22:43:03 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-10 22:43:03 +0000 |
commit | 3ecf1f0179b678437600da322d029ab77726409c (patch) | |
tree | 9b7c34fc6ecf425207d10f14ca1d117b680c8e78 /lib/Target/Alpha | |
parent | 1e1098c6f39590e1e74e5cb3c2a1652d8f3cb16a (diff) | |
download | external_llvm-3ecf1f0179b678437600da322d029ab77726409c.zip external_llvm-3ecf1f0179b678437600da322d029ab77726409c.tar.gz external_llvm-3ecf1f0179b678437600da322d029ab77726409c.tar.bz2 |
Use COPY in targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108063 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha')
-rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index 22b7296..ab30974 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -427,11 +427,8 @@ unsigned AlphaInstrInfo::getGlobalBaseReg(MachineFunction *MF) const { const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); GlobalBaseReg = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass); - bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalBaseReg, Alpha::R29, - &Alpha::GPRCRegClass, &Alpha::GPRCRegClass, - DebugLoc()); - assert(Ok && "Couldn't assign to global base register!"); - Ok = Ok; // Silence warning when assertions are turned off. + BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), + GlobalBaseReg).addReg(Alpha::R29); RegInfo.addLiveIn(Alpha::R29); AlphaFI->setGlobalBaseReg(GlobalBaseReg); @@ -455,11 +452,8 @@ unsigned AlphaInstrInfo::getGlobalRetAddr(MachineFunction *MF) const { const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); GlobalRetAddr = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass); - bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalRetAddr, Alpha::R26, - &Alpha::GPRCRegClass, &Alpha::GPRCRegClass, - DebugLoc()); - assert(Ok && "Couldn't assign to global return address register!"); - Ok = Ok; // Silence warning when assertions are turned off. + BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), + GlobalRetAddr).addReg(Alpha::R26); RegInfo.addLiveIn(Alpha::R26); AlphaFI->setGlobalRetAddr(GlobalRetAddr); |