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author | Edwin Török <edwintorok@gmail.com> | 2009-07-08 20:53:28 +0000 |
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committer | Edwin Török <edwintorok@gmail.com> | 2009-07-08 20:53:28 +0000 |
commit | 4d9756a9843862edb9daddfaa0d8c78ac1c52b32 (patch) | |
tree | 84addd27fd1610e6e8b5a9a82162914726abab4c /lib/Target/Alpha | |
parent | baf982b5cb66e22f492741ca30ea4e2d34399674 (diff) | |
download | external_llvm-4d9756a9843862edb9daddfaa0d8c78ac1c52b32.zip external_llvm-4d9756a9843862edb9daddfaa0d8c78ac1c52b32.tar.gz external_llvm-4d9756a9843862edb9daddfaa0d8c78ac1c52b32.tar.bz2 |
Implement changes from Chris's feedback.
Finish converting lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha')
-rw-r--r-- | lib/Target/Alpha/AlphaCodeEmitter.cpp | 8 | ||||
-rw-r--r-- | lib/Target/Alpha/AlphaISelDAGToDAG.cpp | 2 | ||||
-rw-r--r-- | lib/Target/Alpha/AlphaISelLowering.cpp | 1 | ||||
-rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 8 | ||||
-rw-r--r-- | lib/Target/Alpha/AlphaJITInfo.cpp | 1 | ||||
-rw-r--r-- | lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp | 2 |
6 files changed, 13 insertions, 9 deletions
diff --git a/lib/Target/Alpha/AlphaCodeEmitter.cpp b/lib/Target/Alpha/AlphaCodeEmitter.cpp index 56f515e..9a7c5a4 100644 --- a/lib/Target/Alpha/AlphaCodeEmitter.cpp +++ b/lib/Target/Alpha/AlphaCodeEmitter.cpp @@ -235,10 +235,10 @@ unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI, MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), Alpha::reloc_bsr, MO.getMBB())); } else { - std::string msg; - raw_string_ostream Msg(msg); - Msg << "ERROR: Unknown type of MachineOperand: " << MO; - llvm_report_error(Msg.str()); +#ifndef NDEBUG + cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n"; +#endif + llvm_unreachable(); } return rv; diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index a774850..6fa05fc 100644 --- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -28,7 +28,9 @@ #include "llvm/Intrinsics.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MathExtras.h" +#include "llvm/Support/raw_ostream.h" #include <algorithm> using namespace llvm; diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp index 176255c..49fb262 100644 --- a/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/lib/Target/Alpha/AlphaISelLowering.cpp @@ -25,6 +25,7 @@ #include "llvm/Intrinsics.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" using namespace llvm; /// AddLiveIn - This helper function adds the specified physical register to the diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index 17a9bc2..62b5d4c 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -201,7 +201,7 @@ AlphaInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, .addReg(SrcReg, getKillRegState(isKill)) .addFrameIndex(FrameIdx).addReg(Alpha::F31); else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); } void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, @@ -217,7 +217,7 @@ void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, else if (RC == Alpha::GPRCRegisterClass) Opc = Alpha::STQ; else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); DebugLoc DL = DebugLoc::getUnknownLoc(); MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)); @@ -246,7 +246,7 @@ AlphaInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, BuildMI(MBB, MI, DL, get(Alpha::LDQ), DestReg) .addFrameIndex(FrameIdx).addReg(Alpha::F31); else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); } void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, @@ -261,7 +261,7 @@ void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, else if (RC == Alpha::GPRCRegisterClass) Opc = Alpha::LDQ; else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); DebugLoc DL = DebugLoc::getUnknownLoc(); MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg); diff --git a/lib/Target/Alpha/AlphaJITInfo.cpp b/lib/Target/Alpha/AlphaJITInfo.cpp index 6e9579a..c62ab75 100644 --- a/lib/Target/Alpha/AlphaJITInfo.cpp +++ b/lib/Target/Alpha/AlphaJITInfo.cpp @@ -18,6 +18,7 @@ #include "llvm/CodeGen/JITCodeEmitter.h" #include "llvm/Config/alloca.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" #include <cstdlib> using namespace llvm; diff --git a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp index feab490..11f177d 100644 --- a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp +++ b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp @@ -101,7 +101,7 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) { return; case MachineOperand::MO_Immediate: - llvm_report_error("printOp() does not handle immediate values"); + LLVM_UNREACHABLE("printOp() does not handle immediate values"); return; case MachineOperand::MO_MachineBasicBlock: |