diff options
| author | Dan Gohman <gohman@apple.com> | 2008-02-06 22:27:42 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-02-06 22:27:42 +0000 |
| commit | 69de1932b350d7cdfc0ed1f4198d6f78c7822a02 (patch) | |
| tree | 9509f355cd39a5d69988db1d878c213d0526011d /lib/Target/Alpha | |
| parent | b745e88bf0a6d7f51a336cd6158824e7383e8d24 (diff) | |
| download | external_llvm-69de1932b350d7cdfc0ed1f4198d6f78c7822a02.zip external_llvm-69de1932b350d7cdfc0ed1f4198d6f78c7822a02.tar.gz external_llvm-69de1932b350d7cdfc0ed1f4198d6f78c7822a02.tar.bz2 | |
Re-apply the memory operand changes, with a fix for the static
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha')
| -rw-r--r-- | lib/Target/Alpha/AlphaISelLowering.cpp | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp index c359a5b..d20e1f7 100644 --- a/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/lib/Target/Alpha/AlphaISelLowering.cpp @@ -491,10 +491,9 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { case ISD::VAARG: { SDOperand Chain = Op.getOperand(0); SDOperand VAListP = Op.getOperand(1); - SrcValueSDNode *VAListS = cast<SrcValueSDNode>(Op.getOperand(2)); + const Value *VAListS = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); - SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS->getValue(), - VAListS->getOffset()); + SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS, 0); SDOperand Tmp = DAG.getNode(ISD::ADD, MVT::i64, VAListP, DAG.getConstant(8, MVT::i64)); SDOperand Offset = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Base.getValue(1), @@ -527,13 +526,11 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { SDOperand Chain = Op.getOperand(0); SDOperand DestP = Op.getOperand(1); SDOperand SrcP = Op.getOperand(2); - SrcValueSDNode *DestS = cast<SrcValueSDNode>(Op.getOperand(3)); - SrcValueSDNode *SrcS = cast<SrcValueSDNode>(Op.getOperand(4)); + const Value *DestS = cast<SrcValueSDNode>(Op.getOperand(3))->getValue(); + const Value *SrcS = cast<SrcValueSDNode>(Op.getOperand(4))->getValue(); - SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP, - SrcS->getValue(), SrcS->getOffset()); - SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS->getValue(), - DestS->getOffset()); + SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP, SrcS, 0); + SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS, 0); SDOperand NP = DAG.getNode(ISD::ADD, MVT::i64, SrcP, DAG.getConstant(8, MVT::i64)); Val = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Result, NP, NULL,0, MVT::i32); @@ -544,12 +541,11 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { case ISD::VASTART: { SDOperand Chain = Op.getOperand(0); SDOperand VAListP = Op.getOperand(1); - SrcValueSDNode *VAListS = cast<SrcValueSDNode>(Op.getOperand(2)); + const Value *VAListS = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); // vastart stores the address of the VarArgsBase and VarArgsOffset SDOperand FR = DAG.getFrameIndex(VarArgsBase, MVT::i64); - SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS->getValue(), - VAListS->getOffset()); + SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS, 0); SDOperand SA2 = DAG.getNode(ISD::ADD, MVT::i64, VAListP, DAG.getConstant(8, MVT::i64)); return DAG.getTruncStore(S1, DAG.getConstant(VarArgsOffset, MVT::i64), |