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| author | Dan Gohman <gohman@apple.com> | 2009-02-07 16:15:20 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-02-07 16:15:20 +0000 |
| commit | 96d60921d8568680bad2788b80a163fecb1dbdbe (patch) | |
| tree | d0172d9e89acb9a020afc7b1e9a227dad978682c /lib/Target/Alpha | |
| parent | 3705261d384ef4a20e098142f32dff053af60bca (diff) | |
| download | external_llvm-96d60921d8568680bad2788b80a163fecb1dbdbe.zip external_llvm-96d60921d8568680bad2788b80a163fecb1dbdbe.tar.gz external_llvm-96d60921d8568680bad2788b80a163fecb1dbdbe.tar.bz2 | |
Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha')
| -rw-r--r-- | lib/Target/Alpha/AlphaISelLowering.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/Alpha/AlphaISelLowering.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp index 19029ce..9e963ff 100644 --- a/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/lib/Target/Alpha/AlphaISelLowering.cpp @@ -706,7 +706,7 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint, MachineBasicBlock * AlphaTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, - MachineBasicBlock *BB) { + MachineBasicBlock *BB) const { const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); assert((MI->getOpcode() == Alpha::CAS32 || MI->getOpcode() == Alpha::CAS64 || diff --git a/lib/Target/Alpha/AlphaISelLowering.h b/lib/Target/Alpha/AlphaISelLowering.h index f165a7f..fdd817c 100644 --- a/lib/Target/Alpha/AlphaISelLowering.h +++ b/lib/Target/Alpha/AlphaISelLowering.h @@ -99,7 +99,7 @@ namespace llvm { bool hasITOF() { return useITOF; } MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI, - MachineBasicBlock *BB); + MachineBasicBlock *BB) const; virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; |