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authorOwen Anderson <resistor@mac.com>2009-08-10 22:56:29 +0000
committerOwen Anderson <resistor@mac.com>2009-08-10 22:56:29 +0000
commite50ed30282bb5b4a9ed952580523f2dda16215ac (patch)
treefa8e46b304328a852135fef969e13d47e51196d0 /lib/Target/Blackfin/BlackfinRegisterInfo.cpp
parenta8c6908995c39094fc071e5c629c40773197d571 (diff)
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Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Blackfin/BlackfinRegisterInfo.cpp')
-rw-r--r--lib/Target/Blackfin/BlackfinRegisterInfo.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Blackfin/BlackfinRegisterInfo.cpp b/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
index 86a9550..b8fc6ac 100644
--- a/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
+++ b/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
@@ -87,7 +87,7 @@ BlackfinRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
}
const TargetRegisterClass*
-BlackfinRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, MVT VT) const {
+BlackfinRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const {
assert(isPhysicalRegister(reg) && "reg must be a physical register");
// Pick the smallest register class of the right type that contains
@@ -96,7 +96,7 @@ BlackfinRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, MVT VT) const {
for (regclass_iterator I = regclass_begin(), E = regclass_end();
I != E; ++I) {
const TargetRegisterClass* RC = *I;
- if ((VT == MVT::Other || RC->hasType(VT)) && RC->contains(reg) &&
+ if ((VT == EVT::Other || RC->hasType(VT)) && RC->contains(reg) &&
(!BestRC || RC->getNumRegs() < BestRC->getNumRegs()))
BestRC = RC;
}