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authorScott Michel <scottm@aero.org>2008-01-30 02:55:46 +0000
committerScott Michel <scottm@aero.org>2008-01-30 02:55:46 +0000
commit7f9ba9bb3c969eab32118dd21f15b4b74843c5c1 (patch)
tree7a7ddd1878e8a8dc62d910ee1e88b5c034b4c77d /lib/Target/CellSPU/SPUInstrInfo.h
parent772601a8850808a66270372164941e373074493d (diff)
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More cleanups for CellSPU:
- Expand tabs... (poss 80-col violations, will get them later...) - Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single function, simplifying maintenance. Also reduced custom instruction generation for SPUvecinsert/INSERT_MASK. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46544 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUInstrInfo.h')
-rw-r--r--lib/Target/CellSPU/SPUInstrInfo.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/lib/Target/CellSPU/SPUInstrInfo.h b/lib/Target/CellSPU/SPUInstrInfo.h
index e2ecf9b..10c39a0 100644
--- a/lib/Target/CellSPU/SPUInstrInfo.h
+++ b/lib/Target/CellSPU/SPUInstrInfo.h
@@ -40,8 +40,8 @@ namespace llvm {
// leave the source and dest operands in the passed parameters.
//
virtual bool isMoveInstr(const MachineInstr& MI,
- unsigned& sourceReg,
- unsigned& destReg) const;
+ unsigned& sourceReg,
+ unsigned& destReg) const;
unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
@@ -60,9 +60,9 @@ namespace llvm {
//! Store a register to an address, based on its register class
virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
- SmallVectorImpl<MachineOperand> &Addr,
- const TargetRegisterClass *RC,
- SmallVectorImpl<MachineInstr*> &NewMIs) const;
+ SmallVectorImpl<MachineOperand> &Addr,
+ const TargetRegisterClass *RC,
+ SmallVectorImpl<MachineInstr*> &NewMIs) const;
//! Load a register from a stack slot, based on its register class.
virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
@@ -72,8 +72,8 @@ namespace llvm {
//! Loqad a register from an address, based on its register class
virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
- SmallVectorImpl<MachineOperand> &Addr,
- const TargetRegisterClass *RC,
+ SmallVectorImpl<MachineOperand> &Addr,
+ const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const;
//! Fold spills into load/store instructions