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| author | Kalle Raiskila <kalle.raiskila@nokia.com> | 2010-11-12 10:14:03 +0000 |
|---|---|---|
| committer | Kalle Raiskila <kalle.raiskila@nokia.com> | 2010-11-12 10:14:03 +0000 |
| commit | 7ea1ab5f41299563eb648aed159cfaff09e774d8 (patch) | |
| tree | 9352a3ac97282d9786b31ae08a2d03057186984e /lib/Target/CellSPU/SPUNodes.td | |
| parent | d0c82a683e965f326e36a2bcaa85c00e917f8282 (diff) | |
| download | external_llvm-7ea1ab5f41299563eb648aed159cfaff09e774d8.zip external_llvm-7ea1ab5f41299563eb648aed159cfaff09e774d8.tar.gz external_llvm-7ea1ab5f41299563eb648aed159cfaff09e774d8.tar.bz2 | |
Fix memory access lowering on SPU, adding
support for the case where alignment<value size.
These cases were silently miscompiled before this patch.
Now they are overly verbose -especially storing is- and
any front-end should still avoid misaligned memory
accesses as much as possible. The bit juggling algorithm
added here probably has some room for improvement still.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118889 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUNodes.td')
| -rw-r--r-- | lib/Target/CellSPU/SPUNodes.td | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/lib/Target/CellSPU/SPUNodes.td b/lib/Target/CellSPU/SPUNodes.td index 647da30..dc3dc8c 100644 --- a/lib/Target/CellSPU/SPUNodes.td +++ b/lib/Target/CellSPU/SPUNodes.td @@ -83,10 +83,6 @@ def SPUcntb : SDNode<"SPUISD::CNTB", SDTIntUnaryOp>; // SPUISelLowering.h): def SPUshuffle: SDNode<"SPUISD::SHUFB", SDT_SPUshuffle, []>; -// Shift left quadword by bits and bytes -def SPUshlquad_l_bits: SDNode<"SPUISD::SHLQUAD_L_BITS", SPUvecshift_type, []>; -def SPUshlquad_l_bytes: SDNode<"SPUISD::SHLQUAD_L_BYTES", SPUvecshift_type, []>; - // Vector shifts (ISD::SHL,SRL,SRA are for _integers_ only): def SPUvec_shl: SDNode<"ISD::SHL", SPUvecshift_type, []>; def SPUvec_srl: SDNode<"ISD::SRL", SPUvecshift_type, []>; @@ -105,6 +101,12 @@ def SPUrotbytes_left: SDNode<"SPUISD::ROTBYTES_LEFT", def SPUrotbytes_left_bits : SDNode<"SPUISD::ROTBYTES_LEFT_BITS", SPUvecshift_type>; +// Shift entire quad left by bytes/bits. Zeros are shifted in on the right +// SHL_BITS the same as SHL for i128, but ISD::SHL is not implemented for i128 +def SPUshlquad_l_bytes: SDNode<"SPUISD::SHL_BYTES", SPUvecshift_type, []>; +def SPUshlquad_l_bits: SDNode<"SPUISD::SHL_BITS", SPUvecshift_type, []>; +def SPUsrl_bytes: SDNode<"SPUISD::SRL_BYTES", SPUvecshift_type, []>; + // SPU form select mask for bytes, immediate def SPUselmask: SDNode<"SPUISD::SELECT_MASK", SPUselmask_type, []>; |