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| author | Chris Lattner <sabre@nondot.org> | 2010-04-17 07:38:24 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-04-17 07:38:24 +0000 |
| commit | 54b175ae5878a1e34cb99cb58e2e7db940aed2f1 (patch) | |
| tree | 21b1c90bd32e0b970e178c58ff644b6252116e3c /lib/Target/CellSPU/SPUOperands.td | |
| parent | 36dcaa68ce923335ff7837187dbce74fc6d8e103 (diff) | |
| download | external_llvm-54b175ae5878a1e34cb99cb58e2e7db940aed2f1.zip external_llvm-54b175ae5878a1e34cb99cb58e2e7db940aed2f1.tar.gz external_llvm-54b175ae5878a1e34cb99cb58e2e7db940aed2f1.tar.bz2 | |
a bunch of ssse3 instructions are misencoded to think they have an
i8 field when they really do not. This fixes rdar://7840289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101629 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUOperands.td')
0 files changed, 0 insertions, 0 deletions