Fix newly-introduced 4.3 warnings

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47375 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 8 insertions, 8 deletions

diff --git a/lib/Target/CellSPU/SPUFrameInfo.h b/lib/Target/CellSPU/SPUFrameInfo.h
index 91e4841..99136c2 100644
--- a/lib/Target/CellSPU/SPUFrameInfo.h
+++ b/lib/Target/CellSPU/SPUFrameInfo.h
@@ -34,7 +34,7 @@ namespace llvm {
     getCalleeSaveSpillSlots(unsigned &NumEntries) const;
 
     //! Stack slot size (16 bytes)
-    static const int stackSlotSize() {
+    static int stackSlotSize() {
       return 16;
     }
     //! Maximum frame offset representable by a signed 10-bit integer
@@ -42,19 +42,19 @@ namespace llvm {
       This is the maximum frame offset that can be expressed as a 10-bit
       integer, used in D-form addresses.
      */
-    static const int maxFrameOffset() {
+    static int maxFrameOffset() {
       return ((1 << 9) - 1) * stackSlotSize();
     }
     //! Minimum frame offset representable by a signed 10-bit integer
-    static const int minFrameOffset() {
+    static int minFrameOffset() {
       return -(1 << 9) * stackSlotSize();
     }
     //! Minimum frame size (enough to spill LR + SP)
-    static const int minStackSize() {
+    static int minStackSize() {
       return (2 * stackSlotSize());
     }
     //! Frame size required to spill all registers plus frame info
-    static const int fullSpillSize() {
+    static int fullSpillSize() {
       return (SPURegisterInfo::getNumArgRegs() * stackSlotSize());
     }
     //! Number of instructions required to overcome hint-for-branch latency
@@ -65,7 +65,7 @@ namespace llvm {
       of instructions occurs between the HBR and the target. Currently, HBRs
       take 6 cycles, ergo, the magic number 6.
      */
-    static const int branchHintPenalty() {
+    static int branchHintPenalty() {
       return 6;
     }
   };
diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp
index 4a60755..843760e 100644
--- a/lib/Target/CellSPU/SPURegisterInfo.cpp
+++ b/lib/Target/CellSPU/SPURegisterInfo.cpp
@@ -221,7 +221,7 @@ SPURegisterInfo::getArgRegs()
   return SPU_ArgRegs;
 }
 
-const unsigned
+unsigned
 SPURegisterInfo::getNumArgRegs()
 {
   return sizeof(SPU_ArgRegs) / sizeof(SPU_ArgRegs[0]);
diff --git a/lib/Target/CellSPU/SPURegisterInfo.h b/lib/Target/CellSPU/SPURegisterInfo.h
index f54c111..5520bf3 100644
--- a/lib/Target/CellSPU/SPURegisterInfo.h
+++ b/lib/Target/CellSPU/SPURegisterInfo.h
@@ -90,7 +90,7 @@ namespace llvm {
     static const unsigned *getArgRegs();
 
     //! Return the size of the argument passing register array
-    static const unsigned getNumArgRegs();
+    static unsigned getNumArgRegs();
 
     //! Get DWARF debugging register number
     int getDwarfRegNum(unsigned RegNum, bool isEH) const;