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| author | Dan Gohman <gohman@apple.com> | 2008-07-07 23:14:23 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-07-07 23:14:23 +0000 |
| commit | 8e5f2c6f65841542e2a7092553fe42a00048e4c7 (patch) | |
| tree | 24fe54b796f3f450ba6aff12b7357068ca66e341 /lib/Target/CellSPU | |
| parent | 0e5f1306b059b62d7725f324e087efbc8e7a782d (diff) | |
| download | external_llvm-8e5f2c6f65841542e2a7092553fe42a00048e4c7.zip external_llvm-8e5f2c6f65841542e2a7092553fe42a00048e4c7.tar.gz external_llvm-8e5f2c6f65841542e2a7092553fe42a00048e4c7.tar.bz2 | |
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU')
| -rw-r--r-- | lib/Target/CellSPU/SPUInstrInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp index aef3611..3998b98 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -291,7 +291,7 @@ void SPUInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, assert(0 && "Unknown regclass!"); abort(); } - MachineInstrBuilder MIB = BuildMI(get(Opc)) + MachineInstrBuilder MIB = BuildMI(MF, get(Opc)) .addReg(SrcReg, false, false, isKill); for (unsigned i = 0, e = Addr.size(); i != e; ++i) { MachineOperand &MO = Addr[i]; @@ -378,7 +378,7 @@ void SPUInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, assert(0 && "Unknown regclass!"); abort(); } - MachineInstrBuilder MIB = BuildMI(get(Opc), DestReg); + MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg); for (unsigned i = 0, e = Addr.size(); i != e; ++i) { MachineOperand &MO = Addr[i]; if (MO.isRegister()) @@ -414,7 +414,7 @@ SPUInstrInfo::foldMemoryOperand(MachineFunction &MF, unsigned InReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); if (FrameIndex < SPUFrameInfo::maxFrameOffset()) { - NewMI = addFrameReference(BuildMI(TII.get(SPU::STQDr32)) + NewMI = addFrameReference(BuildMI(MF, TII.get(SPU::STQDr32)) .addReg(InReg, false, false, isKill), FrameIndex); } @@ -423,7 +423,7 @@ SPUInstrInfo::foldMemoryOperand(MachineFunction &MF, bool isDead = MI->getOperand(0).isDead(); Opc = (FrameIndex < SPUFrameInfo::maxFrameOffset()) ? SPU::STQDr32 : SPU::STQXr32; - NewMI = addFrameReference(BuildMI(TII.get(Opc)) + NewMI = addFrameReference(BuildMI(MF, TII.get(Opc)) .addReg(OutReg, true, false, false, isDead), FrameIndex); } } |