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| author | David Blaikie <dblaikie@gmail.com> | 2013-06-16 20:34:15 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2013-06-16 20:34:15 +0000 |
| commit | 6d9dbd5526e3161db884fc4fe99c278bb59ccc19 (patch) | |
| tree | 9fd7129b32b7e8815a4fe5c4064109eec6afa666 /lib/Target/Hexagon/HexagonInstrInfo.cpp | |
| parent | b7770e0b851295141f2b5ec8383380253a75c5f8 (diff) | |
| download | external_llvm-6d9dbd5526e3161db884fc4fe99c278bb59ccc19.zip external_llvm-6d9dbd5526e3161db884fc4fe99c278bb59ccc19.tar.gz external_llvm-6d9dbd5526e3161db884fc4fe99c278bb59ccc19.tar.bz2 | |
Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions
Rather than using the full power of target-specific addressing modes in
DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This
reduces the complexity of debug info handling down to two
representations of values (reg+offset and frame index+offset) rather
than three or four.
Ideally we could ensure that frame indicies had been eliminated by the
time we reached an assembly or dwarf generation, but I haven't spent the
time to figure out where the FIs are leaking through into that & whether
there's a good place to convert them. Some FI+offset=>reg+offset
conversion is done (see PrologEpilogInserter, for example) which is
necessary for some SelectionDAG assumptions about registers, I believe,
but it might be possible to make this a more thorough conversion &
ensure there are no remaining FIs no matter how instruction selection
is performed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184066 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonInstrInfo.cpp')
0 files changed, 0 insertions, 0 deletions