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author | Jyotsna Verma <jverma@codeaurora.org> | 2013-05-10 20:58:11 +0000 |
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committer | Jyotsna Verma <jverma@codeaurora.org> | 2013-05-10 20:58:11 +0000 |
commit | cdfb55d15bbcdf1533ca26ffcb9c94fa5d225bd0 (patch) | |
tree | 9c50cdb4df4daee51145a964c4cf53f0cbf4eaae /lib/Target/Hexagon/HexagonInstrInfo.cpp | |
parent | 1a35b8e2eb165624013d5a2eaf8b673f026999fc (diff) | |
download | external_llvm-cdfb55d15bbcdf1533ca26ffcb9c94fa5d225bd0.zip external_llvm-cdfb55d15bbcdf1533ca26ffcb9c94fa5d225bd0.tar.gz external_llvm-cdfb55d15bbcdf1533ca26ffcb9c94fa5d225bd0.tar.bz2 |
Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181628 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonInstrInfo.cpp')
-rw-r--r-- | lib/Target/Hexagon/HexagonInstrInfo.cpp | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/lib/Target/Hexagon/HexagonInstrInfo.cpp b/lib/Target/Hexagon/HexagonInstrInfo.cpp index 7dec127..33a9373 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.cpp +++ b/lib/Target/Hexagon/HexagonInstrInfo.cpp @@ -1027,6 +1027,16 @@ bool HexagonInstrInfo::isPredicatedNew(unsigned Opcode) const { return ((F >> HexagonII::PredicatedNewPos) & HexagonII::PredicatedNewMask); } +// Returns true, if a ST insn can be promoted to a new-value store. +bool HexagonInstrInfo::mayBeNewStore(const MachineInstr *MI) const { + const HexagonRegisterInfo& QRI = getRegisterInfo(); + const uint64_t F = MI->getDesc().TSFlags; + + return ((F >> HexagonII::mayNVStorePos) & + HexagonII::mayNVStoreMask & + QRI.Subtarget.hasV4TOps()); +} + bool HexagonInstrInfo::DefinesPredicate(MachineInstr *MI, std::vector<MachineOperand> &Pred) const { @@ -1520,6 +1530,31 @@ bool HexagonInstrInfo::isDotNewInst (const MachineInstr* MI) const { (isPredicated(MI) && isPredicatedNew(MI))); } +// Returns the most basic instruction for the .new predicated instructions and +// new-value stores. +// For example, all of the following instructions will be converted back to the +// same instruction: +// 1) if (p0.new) memw(R0+#0) = R1.new ---> +// 2) if (p0) memw(R0+#0)= R1.new -------> if (p0) memw(R0+#0) = R1 +// 3) if (p0.new) memw(R0+#0) = R1 ---> +// + +int HexagonInstrInfo::GetDotOldOp(const int opc) const { + int NewOp = opc; + if (isPredicated(NewOp) && isPredicatedNew(NewOp)) { // Get predicate old form + NewOp = Hexagon::getPredOldOpcode(NewOp); + if (NewOp < 0) + assert(0 && "Couldn't change predicate new instruction to its old form."); + } + + if (isNewValueStore(NewOp)) { // Convert into non new-value format + NewOp = Hexagon::getNonNVStore(NewOp); + if (NewOp < 0) + assert(0 && "Couldn't change new-value store to its old form."); + } + return NewOp; +} + // Return the new value instruction for a given store. int HexagonInstrInfo::GetDotNewOp(const MachineInstr* MI) const { int NVOpcode = Hexagon::getNewValueOpcode(MI->getOpcode()); |