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| author | Sirish Pande <spande@codeaurora.org> | 2012-05-03 21:52:53 +0000 |
|---|---|---|
| committer | Sirish Pande <spande@codeaurora.org> | 2012-05-03 21:52:53 +0000 |
| commit | 26f61a158b3cce69252c05cc0e79f500d6c3d92e (patch) | |
| tree | b3324a781f77ce12e2e208bff093187bb293e00e /lib/Target/Hexagon/HexagonInstrInfo.h | |
| parent | ff9229ecf09c1909adafcdd58134d3ac1414b565 (diff) | |
| download | external_llvm-26f61a158b3cce69252c05cc0e79f500d6c3d92e.zip external_llvm-26f61a158b3cce69252c05cc0e79f500d6c3d92e.tar.gz external_llvm-26f61a158b3cce69252c05cc0e79f500d6c3d92e.tar.bz2 | |
Support for target dependent Hexagon VLIW packetizer.
This patch creates and optimizes packets as per Hexagon ISA rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156109 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonInstrInfo.h')
| -rw-r--r-- | lib/Target/Hexagon/HexagonInstrInfo.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/Hexagon/HexagonInstrInfo.h b/lib/Target/Hexagon/HexagonInstrInfo.h index 7306870..6a45871 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.h +++ b/lib/Target/Hexagon/HexagonInstrInfo.h @@ -160,10 +160,20 @@ public: bool isS8_Immediate(const int value) const; bool isS6_Immediate(const int value) const; + bool isSaveCalleeSavedRegsCall(const MachineInstr* MI) const; + bool isConditionalTransfer(const MachineInstr* MI) const; bool isConditionalALU32 (const MachineInstr* MI) const; bool isConditionalLoad (const MachineInstr* MI) const; + bool isConditionalStore(const MachineInstr* MI) const; bool isDeallocRet(const MachineInstr *MI) const; unsigned getInvertedPredicatedOpcode(const int Opc) const; + bool isExtendable(const MachineInstr* MI) const; + bool isExtended(const MachineInstr* MI) const; + bool isPostIncrement(const MachineInstr* MI) const; + bool isNewValueStore(const MachineInstr* MI) const; + bool isNewValueJump(const MachineInstr* MI) const; + unsigned getImmExtForm(const MachineInstr* MI) const; + unsigned getNormalBranchForm(const MachineInstr* MI) const; private: int getMatchingCondBranchOpcode(int Opc, bool sense) const; |