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author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
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committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp | |
parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp')
-rw-r--r-- | lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp b/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp new file mode 100644 index 0000000..bdccf88 --- /dev/null +++ b/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp @@ -0,0 +1,74 @@ +//===-- HexagonAsmBackend.cpp - Hexagon Assembler Backend -----------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "HexagonMCTargetDesc.h" +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/MC/MCELFObjectWriter.h" + +using namespace llvm; + +namespace { + +class HexagonAsmBackend : public MCAsmBackend { +public: + HexagonAsmBackend(Target const & /*T*/) {} + + unsigned getNumFixupKinds() const override { return 0; } + + void applyFixup(MCFixup const & /*Fixup*/, char * /*Data*/, + unsigned /*DataSize*/, uint64_t /*Value*/, + bool /*IsPCRel*/) const override { + return; + } + + bool mayNeedRelaxation(MCInst const & /*Inst*/) const override { + return false; + } + + bool fixupNeedsRelaxation(MCFixup const & /*Fixup*/, uint64_t /*Value*/, + MCRelaxableFragment const * /*DF*/, + MCAsmLayout const & /*Layout*/) const override { + llvm_unreachable("fixupNeedsRelaxation() unimplemented"); + } + + void relaxInstruction(MCInst const & /*Inst*/, + MCInst & /*Res*/) const override { + llvm_unreachable("relaxInstruction() unimplemented"); + } + + bool writeNopData(uint64_t /*Count*/, + MCObjectWriter * /*OW*/) const override { + return true; + } +}; +} // end anonymous namespace + +namespace { +class ELFHexagonAsmBackend : public HexagonAsmBackend { + uint8_t OSABI; + +public: + ELFHexagonAsmBackend(Target const &T, uint8_t OSABI) + : HexagonAsmBackend(T), OSABI(OSABI) {} + + MCObjectWriter *createObjectWriter(raw_ostream &OS) const override { + StringRef CPU("HexagonV4"); + return createHexagonELFObjectWriter(OS, OSABI, CPU); + } +}; +} // end anonymous namespace + +namespace llvm { +MCAsmBackend *createHexagonAsmBackend(Target const &T, + MCRegisterInfo const & /*MRI*/, + StringRef TT, StringRef /*CPU*/) { + uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS()); + return new ELFHexagonAsmBackend(T, OSABI); +} +} |