diff options
| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2013-05-31 23:45:26 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2013-05-31 23:45:26 +0000 |
| commit | 23ed37a6b76e79272194fb46597f7280661b828f (patch) | |
| tree | a2c447458a013a1f1bcbdc84d43fe3c55c416a0d /lib/Target/Hexagon | |
| parent | cd8e3c4dcf4383b8b1c16827c6326f6e9bc49d51 (diff) | |
| download | external_llvm-23ed37a6b76e79272194fb46597f7280661b828f.zip external_llvm-23ed37a6b76e79272194fb46597f7280661b828f.tar.gz external_llvm-23ed37a6b76e79272194fb46597f7280661b828f.tar.bz2 | |
Make SubRegIndex size mandatory, following r183020.
This also makes TableGen able to compute sizes/offsets of synthesized
indices representing tuples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon')
| -rw-r--r-- | lib/Target/Hexagon/HexagonRegisterInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Hexagon/HexagonRegisterInfo.td b/lib/Target/Hexagon/HexagonRegisterInfo.td index fe41fc3..8ea1b7e 100644 --- a/lib/Target/Hexagon/HexagonRegisterInfo.td +++ b/lib/Target/Hexagon/HexagonRegisterInfo.td @@ -57,8 +57,8 @@ let Namespace = "Hexagon" in { let Aliases = [R]; } - def subreg_loreg : SubRegIndex; - def subreg_hireg : SubRegIndex; + def subreg_loreg : SubRegIndex<32>; + def subreg_hireg : SubRegIndex<32, 32>; // Integer registers. def R0 : Ri< 0, "r0">, DwarfRegNum<[0]>; |