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author | Bill Wendling <isanbard@gmail.com> | 2012-05-01 08:27:43 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2012-05-01 08:27:43 +0000 |
commit | 7c4ce30ea6a9d0410f306e805403dd224c3df65c (patch) | |
tree | a66a2957e7618e50dea4bf61484fc4efa03a9a08 /lib/Target/Hexagon | |
parent | c80e7d2ea46589c5e42e09081a079392f6fbf041 (diff) | |
download | external_llvm-7c4ce30ea6a9d0410f306e805403dd224c3df65c.zip external_llvm-7c4ce30ea6a9d0410f306e805403dd224c3df65c.tar.gz external_llvm-7c4ce30ea6a9d0410f306e805403dd224c3df65c.tar.bz2 |
Change the PassManager from a reference to a pointer.
The TargetPassManager's default constructor wants to initialize the PassManager
to 'null'. But it's illegal to bind a null reference to a null l-value. Make the
ivar a pointer instead.
PR12468
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon')
-rw-r--r-- | lib/Target/Hexagon/HexagonTargetMachine.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/Hexagon/HexagonTargetMachine.cpp b/lib/Target/Hexagon/HexagonTargetMachine.cpp index b9e6894..55bbba7 100644 --- a/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -100,23 +100,23 @@ TargetPassConfig *HexagonTargetMachine::createPassConfig(PassManagerBase &PM) { } bool HexagonPassConfig::addInstSelector() { - PM.add(createHexagonRemoveExtendOps(getHexagonTargetMachine())); - PM.add(createHexagonISelDag(getHexagonTargetMachine())); - PM.add(createHexagonPeephole()); + PM->add(createHexagonRemoveExtendOps(getHexagonTargetMachine())); + PM->add(createHexagonISelDag(getHexagonTargetMachine())); + PM->add(createHexagonPeephole()); return false; } bool HexagonPassConfig::addPreRegAlloc() { if (!DisableHardwareLoops) { - PM.add(createHexagonHardwareLoops()); + PM->add(createHexagonHardwareLoops()); } return false; } bool HexagonPassConfig::addPostRegAlloc() { - PM.add(createHexagonCFGOptimizer(getHexagonTargetMachine())); + PM->add(createHexagonCFGOptimizer(getHexagonTargetMachine())); return true; } @@ -129,14 +129,14 @@ bool HexagonPassConfig::addPreSched2() { bool HexagonPassConfig::addPreEmitPass() { if (!DisableHardwareLoops) { - PM.add(createHexagonFixupHwLoops()); + PM->add(createHexagonFixupHwLoops()); } // Expand Spill code for predicate registers. - PM.add(createHexagonExpandPredSpillCode(getHexagonTargetMachine())); + PM->add(createHexagonExpandPredSpillCode(getHexagonTargetMachine())); // Split up TFRcondsets into conditional transfers. - PM.add(createHexagonSplitTFRCondSets(getHexagonTargetMachine())); + PM->add(createHexagonSplitTFRCondSets(getHexagonTargetMachine())); return false; } |