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author | Evan Cheng <evan.cheng@apple.com> | 2013-01-29 02:32:37 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2013-01-29 02:32:37 +0000 |
commit | 8688a58c53b46d2dda9bf50dafd5195790a7ed58 (patch) | |
tree | 68af412e23ec1d2cb1ddf89586314551b36bd82d /lib/Target/Hexagon | |
parent | 8232ece5c1e57efe54342fb35610497d50bf894f (diff) | |
download | external_llvm-8688a58c53b46d2dda9bf50dafd5195790a7ed58.zip external_llvm-8688a58c53b46d2dda9bf50dafd5195790a7ed58.tar.gz external_llvm-8688a58c53b46d2dda9bf50dafd5195790a7ed58.tar.bz2 |
Teach SDISel to combine fsin / fcos into a fsincos node if the following
conditions are met:
1. They share the same operand and are in the same BB.
2. Both outputs are used.
3. The target has a native instruction that maps to ISD::FSINCOS node or
the target provides a sincos library call.
Implemented the generic optimization in sdisel and enabled it for
Mac OSX. Also added an additional optimization for x86_64 Mac OSX by
using an alternative entry point __sincos_stret which returns the two
results in xmm0 / xmm1.
rdar://13087969
PR13204
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173755 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon')
-rw-r--r-- | lib/Target/Hexagon/HexagonISelLowering.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/Hexagon/HexagonISelLowering.cpp b/lib/Target/Hexagon/HexagonISelLowering.cpp index 1a0e581..9c7243b 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -1364,6 +1364,8 @@ HexagonTargetLowering::HexagonTargetLowering(HexagonTargetMachine setOperationAction(ISD::FSIN , MVT::f32, Expand); setOperationAction(ISD::FCOS , MVT::f32, Expand); setOperationAction(ISD::FREM , MVT::f32, Expand); + setOperationAction(ISD::FSINCOS, MVT::f64, Expand); + setOperationAction(ISD::FSINCOS, MVT::f32, Expand); setOperationAction(ISD::CTPOP, MVT::i32, Expand); setOperationAction(ISD::CTTZ , MVT::i32, Expand); setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); |