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author | Craig Topper <craig.topper@gmail.com> | 2013-07-14 04:42:23 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2013-07-14 04:42:23 +0000 |
commit | a0ec3f9b7b826b9b40b80199923b664bad808cce (patch) | |
tree | 5ef8274354070e15800245d5310f860bb6e78727 /lib/Target/Hexagon | |
parent | 6f71dd765ae9e1d1d0ba01d98a05627ffe3bfc8a (diff) | |
download | external_llvm-a0ec3f9b7b826b9b40b80199923b664bad808cce.zip external_llvm-a0ec3f9b7b826b9b40b80199923b664bad808cce.tar.gz external_llvm-a0ec3f9b7b826b9b40b80199923b664bad808cce.tar.bz2 |
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186274 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon')
-rw-r--r-- | lib/Target/Hexagon/HexagonCallingConvLower.cpp | 2 | ||||
-rw-r--r-- | lib/Target/Hexagon/HexagonCallingConvLower.h | 4 | ||||
-rw-r--r-- | lib/Target/Hexagon/HexagonHardwareLoops.cpp | 8 | ||||
-rw-r--r-- | lib/Target/Hexagon/HexagonISelLowering.cpp | 8 |
4 files changed, 11 insertions, 11 deletions
diff --git a/lib/Target/Hexagon/HexagonCallingConvLower.cpp b/lib/Target/Hexagon/HexagonCallingConvLower.cpp index fc5503a..f5f958c 100644 --- a/lib/Target/Hexagon/HexagonCallingConvLower.cpp +++ b/lib/Target/Hexagon/HexagonCallingConvLower.cpp @@ -25,7 +25,7 @@ using namespace llvm; Hexagon_CCState::Hexagon_CCState(CallingConv::ID CC, bool isVarArg, const TargetMachine &tm, - SmallVector<CCValAssign, 16> &locs, + SmallVectorImpl<CCValAssign> &locs, LLVMContext &c) : CallingConv(CC), IsVarArg(isVarArg), TM(tm), Locs(locs), Context(c) { // No stack is used. diff --git a/lib/Target/Hexagon/HexagonCallingConvLower.h b/lib/Target/Hexagon/HexagonCallingConvLower.h index eed99f4..33c8306 100644 --- a/lib/Target/Hexagon/HexagonCallingConvLower.h +++ b/lib/Target/Hexagon/HexagonCallingConvLower.h @@ -48,14 +48,14 @@ class Hexagon_CCState { CallingConv::ID CallingConv; bool IsVarArg; const TargetMachine &TM; - SmallVector<CCValAssign, 16> &Locs; + SmallVectorImpl<CCValAssign> &Locs; LLVMContext &Context; unsigned StackOffset; SmallVector<uint32_t, 16> UsedRegs; public: Hexagon_CCState(CallingConv::ID CC, bool isVarArg, const TargetMachine &TM, - SmallVector<CCValAssign, 16> &locs, LLVMContext &c); + SmallVectorImpl<CCValAssign> &locs, LLVMContext &c); void addLoc(const CCValAssign &V) { Locs.push_back(V); diff --git a/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/lib/Target/Hexagon/HexagonHardwareLoops.cpp index d002788..3c4ca0f 100644 --- a/lib/Target/Hexagon/HexagonHardwareLoops.cpp +++ b/lib/Target/Hexagon/HexagonHardwareLoops.cpp @@ -134,7 +134,7 @@ namespace { /// has a computable trip count and, if so, return a value that represents /// the trip count expression. CountValue *getLoopTripCount(MachineLoop *L, - SmallVector<MachineInstr*, 2> &OldInsts); + SmallVectorImpl<MachineInstr *> &OldInsts); /// \brief Return the expression that represents the number of times /// a loop iterates. The function takes the operands that represent the @@ -164,7 +164,7 @@ namespace { /// \brief Return true if the instruction is now dead. bool isDead(const MachineInstr *MI, - SmallVector<MachineInstr*, 1> &DeadPhis) const; + SmallVectorImpl<MachineInstr *> &DeadPhis) const; /// \brief Remove the instruction if it is now dead. void removeIfDead(MachineInstr *MI); @@ -428,7 +428,7 @@ bool HexagonHardwareLoops::findInductionRegister(MachineLoop *L, /// induction variable patterns that are used in the calculation for /// the number of time the loop is executed. CountValue *HexagonHardwareLoops::getLoopTripCount(MachineLoop *L, - SmallVector<MachineInstr*, 2> &OldInsts) { + SmallVectorImpl<MachineInstr *> &OldInsts) { MachineBasicBlock *TopMBB = L->getTopBlock(); MachineBasicBlock::pred_iterator PI = TopMBB->pred_begin(); assert(PI != TopMBB->pred_end() && @@ -890,7 +890,7 @@ bool HexagonHardwareLoops::containsInvalidInstruction(MachineLoop *L) const { /// for inline asm, physical registers and instructions with side effects /// removed. bool HexagonHardwareLoops::isDead(const MachineInstr *MI, - SmallVector<MachineInstr*, 1> &DeadPhis) const { + SmallVectorImpl<MachineInstr *> &DeadPhis) const { // Examine each operand. for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); diff --git a/lib/Target/Hexagon/HexagonISelLowering.cpp b/lib/Target/Hexagon/HexagonISelLowering.cpp index 85e1045..6cb126f 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -382,10 +382,10 @@ SDValue HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, SmallVectorImpl<SDValue> &InVals) const { SelectionDAG &DAG = CLI.DAG; - SDLoc &dl = CLI.DL; - SmallVector<ISD::OutputArg, 32> &Outs = CLI.Outs; - SmallVector<SDValue, 32> &OutVals = CLI.OutVals; - SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins; + SDLoc &dl = CLI.DL; + SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; + SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; + SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; SDValue Chain = CLI.Chain; SDValue Callee = CLI.Callee; bool &isTailCall = CLI.IsTailCall; |